公开(公告)号：GB9420737D0

公开(公告)日：1994-11-30

申请号：GB9420737

申请日：1994-10-14

Applicant: HYUNDAI ELECTRONICS AMERICA

IPC: G11B11/10 ,  G11B7/09 ,  G11B11/105

Abstract: PURPOSE: To correct focus errors by providing a lens making reflected light beams turn into a first direction and first photodetectors arranged in positions for receiving at least a part of the reflected light beams. CONSTITUTION: The photodetectors 52 and 54 generate output proportional to light quantity radiated on the photodetectors. The output is processed by a circuit means 56 and a focus error signal is generated. Then, a tracking error signal is generated. The circuit means 56 is connected to a close positioning actuator 36 and the close positioning actuator 36 positions an objective lens 32 so that the beams are appropriately focused on the surface 42 of a disk 34 or they are arranged on the disk 34 in a line with data tracks by using the focus error signal and the tracking error signal.

公开(公告)号：DE69924277D1

公开(公告)日：2005-04-21

申请号：DE69924277

申请日：1999-07-08

Applicant: HYUNDAI ELECTRONICS AMERICA SA

Inventor： KANG INCHUL ,  LAUDEL KENNAN

IPC: H03L7/08 ,  H04B1/707 ,  H04B1/7075 ,  H04B1/7077 ,  H04B1/7085 ,  H04B1/709 ,  H04J11/00 ,  H04J13/00 ,  H04B15/00 ,  H04K1/00

Abstract: A variable rate correlation circuit for conserving power includes a variable clock source, a local PN source, and a correlator. The local PN source further includes a local generator and a resampler. The variable clock source provides a normal clock rate and a lower clock rate. The local generator supplies the local PN sequence at the normal clock rate. The resampler receives the local PN sequence sampled at the normal clock rate and outputs the local PN sequence sampled at the lower clock rate. The correlator receives the lower sampled local PN sequence, the received PN sequence, and the lower clock rate signal, correlating the received and local PN sequences at the lower clock rate to produce a. correlated result.

公开(公告)号：AT291299T

公开(公告)日：2005-04-15

申请号：AT99932333

申请日：1999-07-08

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： KANG INCHUL ,  LAUDEL KENNAN

IPC: H03L7/08 ,  H04B1/707 ,  H04B1/7075 ,  H04B1/7077 ,  H04B1/7085 ,  H04B1/709 ,  H04J11/00 ,  H04J13/00 ,  H04B15/00 ,  H04K1/00

Abstract: A variable rate correlation circuit for conserving power includes a variable clock source, a local PN source, and a correlator. The local PN source further includes a local generator and a resampler. The variable clock source provides a normal clock rate and a lower clock rate. The local generator supplies the local PN sequence at the normal clock rate. The resampler receives the local PN sequence sampled at the normal clock rate and outputs the local PN sequence sampled at the lower clock rate. The correlator receives the lower sampled local PN sequence, the received PN sequence, and the lower clock rate signal, correlating the received and local PN sequences at the lower clock rate to produce a. correlated result.

公开(公告)号：DE69533678D1

公开(公告)日：2004-11-25

申请号：DE69533678

申请日：1995-06-27

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： PROEBSTING ROBERT J

IPC: H03K19/003 ,  G11C7/10 ,  G11C11/34 ,  H03K17/04 ,  H03K17/687 ,  H03K19/017 ,  G11C8/00

Abstract: A fast propagation technique for use in CMOS circuits, whereby faster signal transition at an information carrying edge of a propagating signal is achieved at a cost of slower signal transition at the opposite edge. The technique of the present invention skews a size ratio of P-channel pull-up to N-channel pull-down transistors in the CMOS circuit to obtain much faster transition at one (rising or falling) edge of the signal and slower transition at the opposite edge. The fast propagation technique of the present invention is well suited for synchronous digital CMOS circuits such as synchronous RAMs.

公开(公告)号：DE69817597D1

公开(公告)日：2003-10-02

申请号：DE69817597

申请日：1998-01-13

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： HOLMBERG H ,  ZHU SHAN

IPC: G02B5/20 ,  G02F1/1333 ,  G02F1/1335

Abstract: An improved planar color filter structure to reduce defects in the display devices incorporating the color filter structures, including active matrix displays. A color filter substrate has a thicker polyamide black matrix formed thereon and a transparent polyamide layer formed over the black matrix. The transparent layer is exposed through the black matrix and developed to remove the unexposed portions over the black matrix. The resulting surface is substantially planar and facilitates the forming of the remaining layers to form a substantially planar color filter structure.

公开(公告)号：DE69724327D1

公开(公告)日：2003-10-02

申请号：DE69724327

申请日：1997-05-03

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： PINKHAM RAY ,  YEO CHEOW F

IPC: G11C11/401 ,  G11C7/10 ,  G11C11/409 ,  G11C7/00

Abstract: A video memory device has a normal write mode and a block write mode, and includes a global write driver driving global input/output (I/O) lines, and a number of local write drivers, each driving local I/O lines coupled to a number of memory cells. Control circuitry is coupled to the global write driver and to the local write drivers, and is adapted to generate block write control signals and normal write control signals. The block write control signals cause the write data path to freeze during a block write cycle, thereby conserving power during block writes.

公开(公告)号：DE69531479D1

公开(公告)日：2003-09-18

申请号：DE69531479

申请日：1995-11-01

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： REHM DENNIS J ,  CALLAHAN PHILLIP A

IPC: H04L29/00 ,  H03K5/08 ,  H03K5/24 ,  H03K17/14 ,  H03K17/16 ,  H03K17/687 ,  H03K3/011 ,  H03K6/04 ,  H03K19/0185

Abstract: The invention provides for a signal generator and related method of signal generator that is tolerant to supply voltage fluctuations and differentials. A current switch (10) is arranged to be driven and that is independent of the supply voltage. By clamping the slewing voltage at the gate of a transistor driver (M5,M6), the difference between the clamped gate voltage and the threshold turn on voltage of the driver (M5,M6) is constant with respect to the supply voltage. This causes the transition edges of the driver's output voltage to be constant with respect to the supply voltage. This technique minimizes variations in the output signal edge transitions as the supply voltage varies over various tolerance ranges. Because this technique increases the control of the transition edges in the output signal, it is possible to generate much slower edges and still maintain a consistent transition voltage shape with variations in the supply voltage and the symbol width.

公开(公告)号：DE69331369T2

公开(公告)日：2002-06-20

申请号：DE69331369

申请日：1993-10-22

Applicant: NCR INT INC ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS INC

Inventor： DEMOSS ROBERT A ,  DULAC KEITH B DERBY

IPC: G06F3/06 ,  G06F11/10 ,  G06F12/00 ,  G11B20/18

公开(公告)号：DE69522608T2

公开(公告)日：2002-04-18

申请号：DE69522608

申请日：1995-05-31

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： AVERY JAMES M ,  ISENBERG WILLIAM D

IPC: G06F13/38 ,  G06F13/40

公开(公告)号：DE69523835T2

公开(公告)日：2002-04-11

申请号：DE69523835

申请日：1995-08-04

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： DULAC KEITH

IPC: H04N5/91 ,  G11B27/00 ,  H04N7/16 ,  H04N7/173 ,  H04N7/26 ,  H04N19/00 ,  H04N21/218 ,  H04N21/231 ,  G11C19/00

Abstract: The present invention provides for a digital video storage system, suitable for use within a movie-on-demand (MOD) system, and can include a plurality of disk drive storage devices (101-150; 301-350) the disk drives being connected together for example serially to form a loop (L1), wherein each disk drive (101-15) within the loop (L1) has an input for receiving digital video data for storage and an output for providing stored digital video data, the output of each disk drive (101-150) being connected to the input of the succeeding disk drive in the loop (L1). Successive segments of a video program, stored on successive disk drives (101-150) in the loop (L1), are each repeatedly moved at a predefined time interval from the disk drive (101-150) on which the segments are currently stored to the succeeding disk drive (101-150) in the loop (L1). A plurality of taps (201-250) are connected to the loop (L1) to provide connection points for MOD subscribers or viewers for receiving the video program from the loop (L1). Each tap corresponds to the output of one of the plurality of disk drives (101-150). During operation, the video program is provided at each tap (201-250), however at any instant each tap (201-250) is providing a different segment of the video program. The system also includes means for changing the tap (201-250) to which a MOD subscriber or viewer is connected in response to a request received from the viewer. This feature allows the MOD subscriber to pause, play, or to jump forward or backward in time to the beginning of any movie segment, simulating the operation of a VCR or video disk player.