公开(公告)号：US10062629B2

公开(公告)日：2018-08-28

申请号：US14931720

申请日：2015-11-03

Applicant: RF Micro Devices, Inc.

Inventor： George Maxim ,  Dirk Robert Walter Leipold ,  Marcus Granger-Jones ,  Baker Scott

IPC: H03H7/38 ,  H01L23/31 ,  H01L21/304 ,  H01L21/02 ,  H01L21/683 ,  H01L23/29 ,  H01L23/373 ,  H01L23/00 ,  H05K1/02 ,  H05K1/18 ,  H01Q1/50 ,  H01L23/36 ,  H01L21/56 ,  H01L23/20 ,  H01L23/367 ,  H01L21/306 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L23/315 ,  H01L21/02266 ,  H01L21/02282 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/20 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3731 ,  H01L23/3737 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/562 ,  H01L24/17 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/0002 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01Q1/50 ,  H05K1/0203 ,  H05K1/181 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Antenna aperture tuning circuitry includes a first signal path and a second signal path coupled in parallel between an antenna radiating element and ground. A first LC resonator and a second LC resonator are each coupled between the first signal path and ground. The first LC resonator and the second LC resonator are electromagnetically coupled such that a coupling factor between the first LC resonator and the second LC resonator is between about 1.0% and 40.0%. A third LC resonator and a fourth LC resonator are each coupled between the second signal path and ground. The third LC resonator and the fourth LC resonator are electromagnetically coupled such that a coupling factor between the third LC resonator and the fourth LC resonator is between about 1.0% and 40.0%.

公开(公告)号：US10028390B2

公开(公告)日：2018-07-17

申请号：US14872910

申请日：2015-10-01

Applicant: RF Micro Devices, Inc.

Inventor： Julio C. Costa ,  George Maxim ,  Dirk Robert Walter Leipold ,  Baker Scott

IPC: H01L21/50 ,  H01L21/56 ,  H01L23/48 ,  H05K3/30 ,  H05K3/28 ,  H01F27/24 ,  H01L23/31 ,  H01L23/36 ,  H01L23/373 ,  H01L23/498 ,  H05K3/46 ,  H05K1/18

Abstract: This disclosure relates to integrated circuit (IC) packages and methods of manufacturing the same. In one method, a printed circuit board is provided with semiconductor die. The semiconductor die includes a Back-End-of-Line (BEOL) region, a Front-End-of-Line (FEOL) region, and a semiconductor handle such that the BEOL region, the FEOL region, and the semiconductor handle are stacked. A first polymer layer is provided over the printed circuit board so as to cover the semiconductor die. The semiconductor handle of the semiconductor die is exposed through the first polymer layer and removed. A second polymer layer is then provided so that the BEOL region, the FEOL region, and at least a portion of the second polymer layer are stacked. The second polymer layer may be provided to have high thermal conductivity and electric isolation properties thereby providing advantageous package characteristics.

公开(公告)号：US10008431B2

公开(公告)日：2018-06-26

申请号：US14885202

申请日：2015-10-16

Applicant: RF Micro Devices, Inc.

Inventor： Dirk Robert Walter Leipold ,  Julio C. Costa ,  Baker Scott ,  George Maxim

IPC: H01L23/29 ,  H01L23/31 ,  H01L21/304 ,  H01L21/02 ,  H01L21/683 ,  H01L23/373 ,  H01L23/00 ,  H05K1/02 ,  H05K1/18 ,  H01Q1/50 ,  H01L23/36 ,  H01L21/56 ,  H01L23/20 ,  H01L23/367 ,  H01L21/306 ,  H01L23/522 ,  H01L49/02

Abstract: A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and at least one deep well within the at least one device layer. A protective layer is disposed over the at least one deep well, wherein the protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 106 Ohm-cm.

公开(公告)号：US09998088B2

公开(公告)日：2018-06-12

申请号：US14703060

申请日：2015-05-04

Applicant: RF Micro Devices, Inc.

Inventor： Kushal Bhattacharjee ,  Sergei Zhgoon

IPC: H03H9/25 ,  H01L41/09 ,  H03H9/02 ,  H03H9/17 ,  H03H9/15 ,  H03H9/24

CPC classification number: H03H9/02228 ,  H03H9/02338 ,  H03H9/172 ,  H03H2009/155 ,  H03H2009/241

Abstract: A MEMS vibrating device includes a substrate, at least one anchor on a surface of the substrate, and a vibrating body suspended over the substrate by the at least one anchor. The vibrating body includes a first piezoelectric thin-film layer, a second piezoelectric thin-film layer over the first piezoelectric thin-film layer, and an inter-digital transducer embedded between the first piezoelectric thin-film layer and the second piezoelectric thin-film layer. Embedding the inter-digital transducer between the first piezoelectric thin-film layer and the second piezoelectric thin-film layer may result in enhanced vibrational characteristics of the MEMS vibrating device, thereby increasing the performance thereof.

公开(公告)号：US09997509B2

公开(公告)日：2018-06-12

申请号：US14687310

申请日：2015-04-15

Applicant: RF Micro Devices, Inc.

Inventor： Muhammad Iqbal Chaudhry ,  Nathaniel Peachey

IPC: H02H9/00 ,  H01L27/02

CPC classification number: H01L27/0251 ,  H01L27/0259

Abstract: Aspects disclosed in the detailed description include an electrostatic discharge (ESD) protection circuit. In this regard, in one aspect, an ESD protection circuit is provided to protect an integrated circuit (IC) during fabrication and production. An ESD detection circuitry detects an ESD event by detecting a voltage spike between a supply rail and a ground rail exceeding an ESD threshold voltage. In response to detecting the ESD event, an ESD clamping circuitry is activated to discharge the ESD event, thus protecting the IC from being damaged by the ESD event. By detecting the ESD event based on the ESD threshold voltage, as opposed to detecting the ESD event based on rise time of the voltage spike, it is possible to prevent the ESD clamping circuitry from missing voltage spikes associated with a slow rise time or being falsely activated by a normal power-on voltage associated with a fast rise time.

公开(公告)号：US09942991B2

公开(公告)日：2018-04-10

申请号：US14872910

申请日：2015-10-01

Applicant: RF Micro Devices, Inc.

Inventor： Julio C. Costa ,  George Maxim ,  Dirk Robert Walter Leipold ,  Baker Scott

IPC: H01L21/50 ,  H01L21/56 ,  H01L23/48 ,  H05K3/30 ,  H05K3/28 ,  H01F27/24 ,  H01L23/31 ,  H01L23/36 ,  H01L23/373 ,  H01L23/498 ,  H05K3/46 ,  H05K1/18

Abstract: This disclosure relates to integrated circuit (IC) packages and methods of manufacturing the same. In one method, a printed circuit board is provided with semiconductor die. The semiconductor die includes a Back-End-of-Line (BEOL) region, a Front-End-of-Line (FEOL) region, and a semiconductor handle such that the BEOL region, the FEOL region, and the semiconductor handle are stacked. A first polymer layer is provided over the printed circuit board so as to cover the semiconductor die. The semiconductor handle of the semiconductor die is exposed through the first polymer layer and removed. A second polymer layer is then provided so that the BEOL region, the FEOL region, and at least a portion of the second polymer layer are stacked. The second polymer layer may be provided to have high thermal conductivity and electric isolation properties thereby providing advantageous package characteristics.

公开(公告)号：US09936578B2

公开(公告)日：2018-04-03

申请号：US14517002

申请日：2014-10-17

Applicant: RF Micro Devices, Inc.

Inventor： Thong Dang ,  Mohsen Haji-Rahim ,  Mark Charles Held

IPC: H05K7/00 ,  H05K1/11 ,  H01L23/552 ,  H01L23/00 ,  H05K1/18 ,  H05K9/00 ,  H01L23/31 ,  H05K3/28

CPC classification number: H05K1/111 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/552 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/8201 ,  H01L2224/82031 ,  H01L2224/82101 ,  H01L2224/82136 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/1421 ,  H01L2924/1434 ,  H01L2924/1443 ,  H01L2924/1461 ,  H01L2924/15159 ,  H01L2924/15787 ,  H01L2924/19105 ,  H05K1/185 ,  H05K3/284 ,  H05K9/0022 ,  H05K2201/0715 ,  H05K2201/10439 ,  Y10T29/49016 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2924/00

Abstract: A shielded electronic module is formed on a substrate. The substrate has a component area and one or more electronic components attached to the component area. One set of conductive pads may be attached to the component area and another set of conductive pads may be provided on the electronic component. The conductive pads on the component area are electrically coupled to the conductive pads of the electronic component by a conductive layer. A first insulating layer is provided over the component area and underneath the conductive layer that may insulate the electronic component and the substrate from the conductive layer. A second insulating layer is provided over the first insulating layer that covers at least the conductive layer. In this manner, the conductive layer is isolated from an electromagnetic shield formed over the component area.

公开(公告)号：US09935670B2

公开(公告)日：2018-04-03

申请号：US14497919

申请日：2014-09-26

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat

IPC: H04B1/44 ,  H04B1/40 ,  H04L5/14 ,  H04B1/00 ,  H04B15/00 ,  H04L5/08 ,  H04B7/0413

CPC classification number: H04B1/40 ,  H04B1/0057 ,  H04B7/0413 ,  H04B15/00 ,  H04L5/08 ,  H04L5/14

Abstract: RF front-end circuitry, which includes RF switching and duplexing circuitry, a first RF diplexer, and a second RF diplexer, is disclosed. The RF switching and duplexing circuitry operates in one of a group of RF transmit modes, such that the group of RF transmit modes includes at least one transmit uplink carrier aggregation mode. The RF switching and duplexing circuitry provides at least one RF transmit signal based on the one of the group of RF transmit modes. The first RF diplexer is coupled between the RF switching and duplexing circuitry and a primary RF antenna. The second RF diplexer is coupled between the RF switching and duplexing circuitry and an auxiliary RF antenna.

公开(公告)号：US09917080B2

公开(公告)日：2018-03-13

申请号：US13871526

申请日：2013-04-26

Applicant: RF Micro Devices, Inc.

Inventor： Andrew P. Ritenour

IPC: H01L29/66 ,  H01L27/06 ,  H01L27/02 ,  H01L29/778 ,  H01L29/20

CPC classification number: H01L27/0629 ,  H01L27/0248 ,  H01L29/2003 ,  H01L29/778

Abstract: A semiconductor device with electrical overstress (EOS) protection is disclosed. The semiconductor device includes a semi-insulating layer, a first contact disposed onto the semi-insulating layer, and a second contact disposed onto the semi-insulating layer. A passivation layer is disposed onto the semi-insulating layer. The passivation layer has a dielectric strength that is greater than that of the semi-insulating layer to ensure that a voltage breakdown occurs within the semi-insulating layer within a semi-insulating region between the first contact and the second contact before a voltage breakdown can occur in the passivation layer.

公开(公告)号：US09912307B2

公开(公告)日：2018-03-06

申请号：US15074121

申请日：2016-03-18

Applicant: RF Micro Devices, Inc.

Inventor： Timothy D. Lewis

IPC: H03F9/02 ,  H03F3/21 ,  H01F17/00 ,  H01F27/28 ,  H01F27/38

CPC classification number: H03F3/211 ,  H01F17/0006 ,  H01F27/2804 ,  H01F27/289 ,  H01F27/38 ,  H03F2200/537

Abstract: Devices and related methods use a decoupling loop near closely spaced inductors that couples to each inductor and adds an additional coupling path between them, canceling the effects of the direct coupling between the inductors. When two inductors are close enough that undesired magnetic coupling between the inductors is possible, a decoupling loop adjacent the inductors is added that is configured to cancel the undesired magnetic coupling between the inductors. The decoupling loop is positioned, with respect to the first and second inductors, such that coupling between the decoupling loop and the first inductor induces a decoupling loop current around the decoupling loop and induces a second induced current on the second inductor that is equal and in an opposite direction to a first induced current on the second inductor caused by the first inductor. The undesired magnetic coupling between the conductors is reduced, and may even be totally cancelled.