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公开(公告)号：US11824504B2
公开(公告)日：2023-11-21
申请号：US17342040
申请日：2021-06-08
Applicant: STMicroelectronics (Alps) SAS
Inventor： Kuno Lenz
CPC classification number: H03F3/45475 , H03F1/0205 , H03F3/45636 , H03F2203/45048 , H03F2203/45138
Abstract: The present disclosure relates to a device comprising two error amplifier stages having their first inputs interconnected, their second inputs interconnected and their outputs coupled to an output of the device, each stage comprising an operational amplifier; a circuit for calibrating the amplifier; a switch coupling an input of the amplifier to the first input; a switch coupling another input of the amplifier to the second input; a switch coupling an output of the amplifier to the stage output; a switch having on state which short-circuits the inputs of the amplifier; and a switch coupling the output of the amplifier to the calibration circuit.
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公开(公告)号：US20230327621A1
公开(公告)日：2023-10-12
申请号：US18189665
申请日：2023-03-24
Inventor： Vratislav Michal
CPC classification number: H03F3/45179 , H03F1/0205
Abstract: In an embodiment a device includes an input node configured to receive a first current, an output node configured to provide a second current determined by the first current, a first resistor having a first terminal connected to the input node and a second terminal coupled to a first node configured to receive a first supply voltage, a first MOS transistor having a source connected to the first node and a drain coupled to the output node of the device, a second resistor having a first terminal connected to a gate of the first MOS transistor, a biasing circuit configured to provide a biasing voltage on a second terminal of the second resistor and a first capacitor connected between the input node and the gate of the first MOS transistor.
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公开(公告)号：US20230291216A1
公开(公告)日：2023-09-14
申请号：US18117619
申请日：2023-03-06
Inventor： Alexandre TRAMONI , Nicolas LAFARGUE
CPC classification number: H02J7/0047 , H02J7/00711 , H02J7/007182 , G06F1/28 , H04B5/0043
Abstract: A circuit monitors a first voltage delivered by a battery. The monitored first voltage is compared with a second voltage. When the comparator detects that the first voltage is smaller than the second voltage, a counter starts counting. If the value of the counter during said counting exceeds a limiting value, an interruption signal is generated to control an operating mode of an electronic device power by said battery.
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公开(公告)号：US20230268928A1
公开(公告)日：2023-08-24
申请号：US18112056
申请日：2023-02-21
Inventor： Nicolas MOENECLAEY , Laurent VACCARIELLO
IPC: H03M1/38 , G01J1/44 , G01J1/42 , H01L27/144
CPC classification number: H03M1/38 , G01J1/44 , G01J1/4204 , H01L27/1446 , H01L27/1443 , G01J2001/448 , G01J2001/446
Abstract: An ambient light sensor includes pixels arranged in an array. Each pixel includes a doped insulated well of a first type, a pinned photodiode in the well, a doped region of a second type arranged in the well, a transfer gate coupling the photodiode to said region, and a first circuit applying a first or second potential to the well. A successive approximation analog-to-digital converter of the sensor has a node connected to the doped regions of the pixels, a switch applying a third potential to the node, a comparator coupled to the node, and a second circuit receiving an output of the comparator and controlling the first circuits to selectively apply the first and second potentials. A sensor control circuit controls the gates and the first switch.
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公开(公告)号：US11703901B2
公开(公告)日：2023-07-18
申请号：US17737692
申请日：2022-05-05
Inventor： Jean Camiolo , Alexandre Pons
IPC: G05F1/575 , G01R19/165 , G05F3/18 , G06F1/26 , H03F3/45 , H03K3/0233 , G05F1/56
CPC classification number: G05F1/575 , G01R19/16528 , G05F1/56 , G05F3/185 , G06F1/266 , H03F3/45076 , H03K3/02337
Abstract: A first terminal receives a first DC voltage. A switch selectively couples the first terminal to a second terminal providing an output. A control circuit selectively actuates the switch in response to a comparison of the first DC voltage to a second DC voltage. A low-dropout (LDO) linear voltage regulator, connected between the first and third terminals, operates to provide the second DC voltage from the first DC voltage.
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Patent Agency Ranking
公开(公告)号：US11653441B2
公开(公告)日：2023-05-16
申请号：US16951695
申请日：2020-11-18
Inventor： Julien Didion , Thierry Lapergue
CPC classification number: H05K1/025 , H04B1/16 , H05K1/181 , H05K2201/09272 , H05K2201/09281 , H05K2201/10045 , H05K2201/10098
Abstract: A device includes a printed circuit board substrate, an antenna connected to the printed circuit board substrate, an amplifier connected to the printed circuit board substrate, and a matching track having a first end electrically connected to an input of the amplifier and a second end electrically connected to an output of the antenna. The matching track has an outgrowth that is symmetrical along a median axis of the outgrowth. The matching track is rectilinear and has a constant width over an initial part extending between the widening area and the first end. A median axis of the initial part and the median axis of the outgrowth form an angle comprised between 60 and 120°.
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公开(公告)号：US20230113667A1
公开(公告)日：2023-04-13
申请号：US18065475
申请日：2022-12-13
Inventor： Jawad Benhammadi , Sylvain Meyer
IPC: G06F13/24 , G06F13/16 , G06F21/85 , H03K19/20 , G06F1/3237
Abstract: In accordance with an embodiment, an electronic device includes: an interrupt controller having an input for receiving a controller clock signal, and an output, the interrupt controller configured to deliver an output interrupt signal on the output when the controller clock signal is active, and a control circuit comprising, an input interface for receiving at least one interrupt signal likely to emanate from at least one item of equipment external to the device, a clock input for receiving an external clock signal, and a first controller connected to the input interface and to the clock input, the first controller configured to automatically generate the controller clock signal from the external clock signal from when the at least one interrupt signal is asserted until a delivery of a corresponding output interrupt signal.
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公开(公告)号：US20230098647A1
公开(公告)日：2023-03-30
申请号：US18062980
申请日：2022-12-07
Applicant: STMicroelectronics (Alps) SAS
Inventor： Michel Bouche
Abstract: An embodiment of the present disclosure relates to an electronic circuit including a first switch coupling a first node of the circuit to an input/output terminal of the circuit; a second switch coupling the first node to a second node of application of a fixed potential; and a highpass filter having an input coupled to the terminal and an output coupled to a control terminal of the second switch.
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公开(公告)号：US20230087239A1
公开(公告)日：2023-03-23
申请号：US18059812
申请日：2022-11-29
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Rousset) SAS , STMicroelectronics S.r.l.
Abstract: The present disclosure relates to an electronic device comprising a first capacitor and a quartz crystal coupled in series between a first node and a second node; an inverter coupled between the first and second nodes; a first variable capacitor coupled between the first node and a third node; and a second variable capacitor coupled between the second node and the third node.
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公开(公告)号：US20220399880A1
公开(公告)日：2022-12-15
申请号：US17830864
申请日：2022-06-02
Applicant: STMicroelectronics S.r.l. , STMicroelectronics (Alps) SAS
Inventor： Antonino Conte , Marco Ruta , Michelangelo Pisasale , Thomas Jouanneau
Abstract: In an embodiment a ring oscillator circuit includes a chain of cascade-coupled inverter stages coupled between an oscillator supply voltage node and a reference voltage node, the oscillator supply voltage node configured to provide an oscillator supply voltage, a current generator circuit coupled between the oscillator supply voltage node and a system supply voltage node configured to provide a system supply voltage, the current generator circuit being configured to inject a current into the oscillator supply voltage node and a biasing circuit including a first bias control transistor and a second bias control transistor coupled in series between the reference voltage node and the oscillator supply voltage node, wherein the first bias control transistor is configured to selectively couple the reference voltage node and the oscillator supply voltage node in response to the oscillator control signal being indicative that the ring oscillator circuit is in an inactive operation state.
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