公开(公告)号：KR1020060042446A

公开(公告)日：2006-05-15

申请号：KR1020040091027

申请日：2004-11-09

Applicant: 삼성전자주식회사

Inventor： 최재호

IPC: F24F11/00 ,  F24F11/02

CPC classification number: F24F11/30 ,  F24F11/54 ,  F24F11/62 ,  F25B2313/023 ,  F25B2313/025

Abstract: 개시된 발명은 복수 실외기에 대한 프로그램 버전을 확인하여 이미 적용하고 있는 프로그램을 업그레이드할 실외기를 선택한 후 공용 통신선을 통하여 새로운 프로그램을 제공하는 유선리모컨을 포함하며, 이로써 복수 실외기에 대한 프로그램 업그레이드를 신속하고 간편하게 처리할 수 있다.

公开(公告)号：KR1020060039362A

公开(公告)日：2006-05-08

申请号：KR1020040088508

申请日：2004-11-02

Applicant: 삼성전자주식회사

Inventor： 최재호

IPC: G06F13/14

Abstract: 본 발명은, 적어도 하나의 메모리카드가 착탈 가능하고, 장착되는 상기 메모리카드의 리드(read)/라이트(write)를 가능하게 하며, 소정의 구동전원을 공급하는 모니터장치에 선택적으로 장착되는 와이즈링크모듈에 관한 것으로서, 선택적으로 장착되어 상기 모니터장치로부터의 구동전원과 분리된 소정의 구동전원을 공급하는 전원공급부를 포함하는 것을 특징으로 한다. 이에 의하여, 자체적으로 전원 공급이 가능하여 모니터장치와 분리되어 있는 상태에서도 메모리카드의 리드/라이트를 수행할 수 있는 와이즈링크모듈을 제공할 수 있다.

公开(公告)号：KR1020050001945A

公开(公告)日：2005-01-07

申请号：KR1020030042953

申请日：2003-06-28

Applicant: 삼성전자주식회사

Inventor： 최재호 ,  김장수

IPC: G02F1/1339

Abstract: PURPOSE: An LCD(Liquid Crystal Display) is provided to form a color filter and a column spacer on a seal line region and a display region identically, thereby enhancing a display quality and maintaining uniformity of a cell gap. CONSTITUTION: The first substrate(100) has a TFT(Thin Film Transistor)(120) and plural color pixels. The second substrate(200) is combined with the first substrate, facing with each other. A liquid crystal layer(300) is interposed between the first and second substrates. A column spacer(400) maintains a cell gap between the first and second substrates. An adhesive member(500) combines the first and second substrates. The first substrate includes the first transparent substrate(110), an array layer(140) for applying and blocking voltage to the liquid crystal layer, the first and second color filter layers(150,155) for emitting predetermined colors by using the light provided from the outside and a transparent pixel electrode(160).

Abstract translation: 目的：提供LCD（液晶显示器）以在密封线区域和显示区域上相同地形成滤色器和柱间隔物，从而提高显示质量并保持单元间隙的均匀性。 构成：第一基板（100）具有TFT（薄膜晶体管）（120）和多个彩色像素。 第二基板（200）与第一基板相互面对。 液晶层（300）介于第一和第二基板之间。 柱间隔件（400）在第一和第二基板之间保持单元间隙。 粘合部件（500）组合第一和第二基板。 第一基板包括第一透明基板（110），用于施加和阻挡液晶层电压的阵列层（140），第一和第二滤色器层（150,155），用于通过使用从 外部和透明像素电极（160）。

公开(公告)号：KR1020040004857A

公开(公告)日：2004-01-16

申请号：KR1020020038919

申请日：2002-07-05

Applicant: 삼성전자주식회사

Inventor： 송장근 ,  최재호

IPC: G02F1/1339

CPC classification number: G02F1/13394 ,  G02F1/133509 ,  G02F2001/13398 ,  G03F7/20

Abstract: PURPOSE: A method of simultaneously forming a spacer and a domain dividing protrusion is provided to simultaneously form spacers having different heights. CONSTITUTION: A photoresist is coated on a substrate(200), to form a photoresist film(201). Optical masks(MP1,MP2) having mask patterns that define the first pillar region(A) and the first protrusion region(B), respectively, are placed on the photoresist film. The photoresist film is exposed through the optical masks. The optical masks are moved by a predetermined distance such that the mask patterns define the second pillar region(A2) and the second protrusion region(B2) of the photoresist film. The photoresist film is exposed again through the optical mask. The photoresist film exposed twice is developed and then heated. The second pillar region is partially superposed on the first pillar region, and the second protrusion region is partially superposed on the first protrusion region.

Abstract translation: 目的：提供同时形成间隔物和分割突起的方法，以同时形成具有不同高度的间隔物。 构成：将光致抗蚀剂涂覆在基材（200）上，以形成光致抗蚀剂膜（201）。 具有分别限定第一柱区域（A）和第一突出区域（B）的掩模图案的光掩模（MP1，MP2）分别放置在光致抗蚀剂膜上。 光致抗蚀剂膜通过光掩模曝光。 使光掩模移动预定距离，使得掩模图案限定光致抗蚀剂膜的第二柱区域（A2）和第二突出区域（B2）。 光致抗蚀剂膜再次通过光学掩模曝光。 曝光两次的光致抗蚀剂膜显影，然后加热。 第二柱区域部分地重叠在第一柱状区域上，第二突出区域部分地重叠在第一突出区域上。

公开(公告)号：KR1020010061890A

公开(公告)日：2001-07-07

申请号：KR1019990064440

申请日：1999-12-29

Applicant: 삼성전자주식회사

Inventor： 김태형 ,  최재호

IPC: H01L21/56

CPC classification number: H01L2224/48091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: PURPOSE: A molding die of a semiconductor chip package is provided to improve the reliability of a semiconductor package by preventing a crack of the semiconductor package. CONSTITUTION: A molding die has a structure including an upper die and a lower die for molding a package body of a semiconductor chip package and an ejection pin. The power die comprises a cavity(6) having a rectangular bottom face. The ejection pin is composed of the first ejection pin(108) and the second ejection pin(108'). The first and the second ejection pins(108,108') are projected from the bottom face of the cavity(6). The first ejection pin(108) is projected from the center of gravity of a virtual triangle(triangle ABC) divided by a diagonal line(AC) of the bottom face. The second ejection pin(108') is projected from the center of gravity of the remaining virtual triangle(triangle ACD) divided by the diagonal line(AC) of the bottom face.

Abstract translation: 目的：提供半导体芯片封装的成型模，以通过防止半导体封装的裂纹来提高半导体封装的可靠性。 构成：成形模具具有包括上模和下模的结构，用于模制半导体芯片封装的封装体和喷射销。 功率模具包括具有矩形底面的空腔（6）。 喷射销由第一喷射销（108）和第二喷射销（108'）组成。 第一和第二弹出销（108,108'）从空腔（6）的底面突出。 第一弹出销（108）从虚拟三角形（三角形ABC）的重心被底面的对角线（AC）除以突出。 第二弹出销（108'）从残留的虚拟三角形（三角形ACD）的重心被投影到所述底面的对角线（AC）上。

公开(公告)号：KR1020010046328A

公开(公告)日：2001-06-15

申请号：KR1019990050045

申请日：1999-11-11

Applicant: 삼성전자주식회사

Inventor： 최재호

IPC: G02F1/136

Abstract: PURPOSE: A thin film transistor(TFT) substrate for use in a liquid crystal display(LCD) device and a method for manufacturing the same are to prevent data interconnections to be shorted by applying a double layer of a main and an auxiliary data interconnection. CONSTITUTION: Gate interconnections(21-25) are formed on a substrate(10) using a photolithography. A gate insulating layer(30), a semiconductor layer(40) and the first conductive layer(50) are sequently deposited to enclose the gate interconnection. The first conductive layer and the semiconductor layer are patterned using the photolithography. The second conductive layer(60) is deposited and patterned using the photolithography, thereby forming auxiliary data interconnections(71-76). Main data interconnections(61-63, 66-68) are obtained by patterning the first conducive layer whose portion is not enclosed by the auxiliary data interconnection. A passivation layer(80) is deposited on the auxiliary data interconnection. The passivation layer is patterned using the photolithography, thereby forming contact holes(81-83). The third conductive layer is deposited and patterned to form a pixel electrode(91) using the photolithography.

Abstract translation: 目的：用于液晶显示（LCD）装置的薄膜晶体管（TFT）基板及其制造方法是通过应用主要和辅助数据互连的双层来防止数据互连短路。 构成：使用光刻法在基板（10）上形成栅极互连（21-25）。 依次沉积栅极绝缘层（30），半导体层（40）和第一导电层（50）以包围栅极互连。 使用光刻法将第一导电层和半导体层图案化。 使用光刻法沉积和图案化第二导电层（60），从而形成辅助数据互连（71-76）。 主数据互连（61-63,66-68）通过图案化其部分未被辅助数据互连包围的第一导电层获得。 钝化层（80）沉积在辅助数据互连上。 使用光刻对钝化层进行图案化，从而形成接触孔（81-83）。 沉积和图案化第三导电层以形成使用光刻法的像素电极（91）。

公开(公告)号：KR1020010029164A

公开(公告)日：2001-04-06

申请号：KR1019990041828

申请日：1999-09-29

Applicant: 삼성전자주식회사

Inventor： 최재호

IPC: G02F1/136

Abstract: PURPOSE: A thin film transistor substrate is provided to reduce signal delay of a data wire, prevent the data wire from being corroded by an etchant, and prevent the data wire from being opened. CONSTITUTION: A gate wire is formed on a substrate(10) and comprises a plurality of gate lines(21,121), gate electrodes(22,122) and gate pads(23,123). A gate insulating film(30) is formed on the gate wire(21,22,23,121,122,123), and a semiconductor pattern(41) is formed on the gate insulating film(30). The first auxiliary data wire is formed on ohmic contact patterns(51,52) and a plurality of first auxiliary data lines(61) crossed with the gate line(21), a source electrode lower layer(62) connected to the first auxiliary data line(61) and a drain electrode lower layer(63). A pixel electrode(71) and the second auxiliary data wire(72,73,74,75) are formed on the first auxiliary data wire(61,62,63). The second auxiliary data wire(72,73,74,75) comprises the second auxiliary data line(72), a source electrode upper layer(73), a drain electrode upper layer(74) and a data pad(75). The second auxiliary data line(72) and the source electrode upper layer(73) cover the first auxiliary data line(61) and the source electrode lower layer(62). The drain electrode upper layer(63) is contact with the drain electrode lower layer(75) so as to cover the layer(75) and is connected with the pixel electrode(71). A passivation insulating film(80) is formed on the pixel electrode(71) and the second auxiliary data wire(72,73,74,75).

Abstract translation: 目的：提供薄膜晶体管基板以减少数据线的信号延迟，防止数据线被蚀刻剂腐蚀，并防止数据线被打开。 构成：栅极线形成在衬底（10）上并且包括多条栅极线（21,121），栅电极（22,122）和栅极焊盘（23,123）。 在栅极线（21,22,23,121,122,123）上形成栅极绝缘膜（30），在栅极绝缘膜（30）上形成半导体图案（41）。 第一辅助数据线形成在与栅极线（21）交叉的欧姆接触图案（51,52）和多个第一辅助数据线（61）上，源电极下层（62）连接到第一辅助数据 线（61）和漏电极下层（63）。 像素电极（71）和第二辅助数据线（72,73,74,75）形成在第一辅助数据线（61,62,63）上。 第二辅助数据线（72,73,74,75）包括第二辅助数据线（72），源电极上层（73），漏电极上层（74）和数据垫（75）。 第二辅助数据线（72）和源电极上层（73）覆盖第一辅助数据线（61）和源电极下层（62）。 漏电极上层63与漏电极下层75接触，覆盖层75并与像素电极71连接。 在像素电极（71）和第二辅助数据线（72,73,74,75）上形成钝化绝缘膜（80）。

公开(公告)号：KR1020010026465A

公开(公告)日：2001-04-06

申请号：KR1019990037798

申请日：1999-09-07

Applicant: 삼성전자주식회사

Inventor： 이재혁 ,  최재호 ,  이상원

IPC: H01L23/48

Abstract: PURPOSE: A method for manufacturing a semiconductor chip package is provided to reduce manufacturing cost by prescreening the presence of defects during a process. CONSTITUTION: In the method, a semiconductor chip(11) is attached onto a die pad(21) of a lead frame and electrically coupled to leads(22) of the lead frame by bonding wires. The leads(22) are electrically isolated from each other and mechanically supported by a polyimide tape running across the leads(22) and adhering to the lead frame. The chip(11) and the electrical coupling parts between the chip(11) and the leads(22) are then molded with a mold resin in a package body(30) for protection from external environment. The molded lead frame is then supplied to a degate die(60) in which a cull(57), namely, a residual mold resin, is removed. In particular, the degate die(60) is equipped with a test socket(40) having connectable pads(41). The leads(22) of the lead frame keep in contact with the respective connectable pads(41) to examine electrical characteristics of the chip package before further manufacturing processes is performed.

Abstract translation: 目的：提供一种用于制造半导体芯片封装的方法，以通过在处理期间预先筛选缺陷的存在来降低制造成本。 构成：在该方法中，将半导体芯片（11）附接到引线框架的芯片焊盘（21）上，并通过接合线电连接到引线框架的引线（22）。 引线（22）彼此电隔离并且由穿过引线（22）的聚酰亚胺带机械地支撑并粘附到引线框架。 芯片（11）和芯片（11）与引线（22）之间的电连接部件然后用模制树脂模制在封装主体（30）中，以防止外界环境。 然后，将模制的引线框架提供到去除模具（60），其中去除了ull（57），即残留的模制树脂。 特别地，去离子模具（60）装备有具有可连接焊盘（41）的测试插座（40）。 引线框架的引线（22）与相应的可连接焊盘（41）保持接触，以检查执行进一步的制造工艺之前芯片封装的电气特性。

公开(公告)号：KR1020000066151A

公开(公告)日：2000-11-15

申请号：KR1019990013033

申请日：1999-04-13

Applicant: 삼성전자주식회사

Inventor： 최재호

IPC: G02F1/136

Abstract: PURPOSE: A TFT substrate for LCD and a repair method therefor are provided to enhance the brightness of the LCD without increasing mask processes. CONSTITUTION: A TFT substrate for LCD comprises an insulation substrate(10), plural gate lines(110), plural common electrodes(130), a gate insulation film(20), an ITO data sub lines(310), data lines(410) and pixel electrodes(330). The gate lines(110) are transversely formed on the substrate(10). The common electrodes(130) are formed on the same layer as the gate lines. The gate insulation film(20) is formed on the gate lines and the common electrodes. The data sub lines(310) are lengthwise formed on the insulation film. The data lines(410) are lengthwise formed on the sub lines and consist of double film of a lower metal film and an upper Al film.

Abstract translation: 目的：提供用于LCD的TFT基板及其修复方法，以在不增加掩模工艺的情况下提高LCD的亮度。 构成：用于LCD的TFT基板包括绝缘基板（10），多个栅极线（110），多个公共电极（130），栅极绝缘膜（20），ITO数据子线（310），数据线 ）和像素电极（330）。 栅极线（110）横向地形成在基板（10）上。 公共电极（130）形成在与栅极线相同的层上。 栅极绝缘膜（20）形成在栅极线和公共电极上。 数据子线（310）纵向地形成在绝缘膜上。 数据线（410）纵向形成在子线上，由下部金属膜和上部Al膜的双层膜构成。

公开(公告)号：KR1020000042982A

公开(公告)日：2000-07-15

申请号：KR1019980059281

申请日：1998-12-28

Applicant: 삼성전자주식회사

Inventor： 손영평 ,  허황영 ,  최재호

IPC: H01L21/66

Abstract: PURPOSE: A remote control circuit for plural semiconductor manufacturing equipments is provided to enable a sequential and automatic monitoring of the equipments. CONSTITUTION: A plurality of equipments, for example, five exposure equipments, are controlled by a remote control circuit which includes a first receiving unit(100), a second receiving unit(200), a counter unit(300), a control unit(400), a tower lamp(500), and a displayer(600). The first receiving unit(100) and the second receiving unit(200) respectively receive an error signal and an exposure completion signal from each equipment, and then convert the error signal into a driving signal for the control unit(400). The counter unit(300) generates a sequential signal from five output terminals. The control unit(400) controls the equipments according to signals transmitted from the first and the second receiving units(100,200) and the counter unit(300). The tower lamp(500) indicates an error of the equipments or a completion of the exposure process according to the signals of the first or the second receiving unit(100,200). Similarly, the displayer(600) indicates the number of the equipment transmitting the signals.

Abstract translation: 目的：提供多个半导体制造设备的遥控电路，以便对设备进行顺序和自动的监控。 构成：多个设备，例如五个曝光设备，由遥控电路控制，遥控电路包括第一接收单元（100），第二接收单元（200），计数单元（300），控制单元 400），塔灯（500）和显示器（600）。 第一接收单元（100）和第二接收单元（200）分别从每个设备接收误差信号和曝光完成信号，然后将误差信号转换成用于控制单元（400）的驱动信号。 计数器单元（300）从五个输出端产生顺序信号。 控制单元（400）根据从第一和第二接收单元（100,200）和计数器单元（300）发送的信号来控制设备。 塔灯（500）根据第一或第二接收单元（100,200）的信号指示设备的错误或曝光处理的完成。 类似地，显示器（600）指示发送信号的设备的编号。