ELECTRIC FIELD SENSOR HAVING A GAS CELL

    公开(公告)号:US20250147089A1

    公开(公告)日:2025-05-08

    申请号:US18500184

    申请日:2023-11-02

    Abstract: An electric field sensor includes a gas cell having a first terminal and a second terminal. A ground plane is proximate the gas cell. A transmitter has an input and an output. The transmitter's output is communicatively coupled to the first terminal of the gas cell. A receiver has an input and an output. The receiver's input is communicatively coupled to the second terminal. A processing circuit has a processing circuit input and a processing circuit output. The processing circuit input is coupled to the output of the receiver, and the processing circuit output is coupled to the input of the transmitter.

    QUANTUM-BASED DEVICE INCLUDING VAPOR CELL
    93.
    发明公开

    公开(公告)号:US20240142915A1

    公开(公告)日:2024-05-02

    申请号:US18374724

    申请日:2023-09-29

    CPC classification number: G04F5/145 H03L7/26

    Abstract: In one example, a system includes a first sealed container, a second sealed container, a signal coupler, a container enclosure, and an electromagnetic (EM) reflective coating. The first sealed container encloses a first dipolar gas. The second sealed container encloses a second dipolar gas. The signal coupler is communicatively coupled between the first and second sealed containers. The signal coupler includes a solid material or a hollow sealed tube. The container enclosure encloses the first and second sealed containers and the signal coupler. The EM reflective coating is inside the container enclosure and covers at least part of the first container, at least part of the second container, and at least part of the signal coupler.

    CHARGE PUMP
    96.
    发明申请

    公开(公告)号:US20210376838A1

    公开(公告)日:2021-12-02

    申请号:US17397954

    申请日:2021-08-09

    Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.

    Millimeter wave chip scale atomic clock

    公开(公告)号:US11126144B2

    公开(公告)日:2021-09-21

    申请号:US16844819

    申请日:2020-04-09

    Abstract: A clock generator includes a hermetically sealed cavity and clock generation circuitry. A dipolar molecule that exhibits a quantum rotational state transition at a fixed frequency is disposed in the cavity. The clock generation circuitry is configured to generate an output clock signal based on the fixed frequency of the dipolar molecule. The clock generation circuitry includes a detector circuit, a multiplier, and reference oscillator control circuitry. The detector circuit is coupled to the cavity, and is configured to generate a detection signal representative of an amplitude of a signal at an output of the cavity. The multiplier is coupled to the detector circuit, and is configured to multiply the detection signal with a mixing signal to produce a derivative of the detection signal. The reference oscillator control circuitry is configured to set a frequency of a reference oscillator based on the derivative of the detection signal.

    High linearity phase interpolator
    100.
    发明授权

    公开(公告)号:US10855294B2

    公开(公告)日:2020-12-01

    申请号:US15346524

    申请日:2016-11-08

    Abstract: A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.

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