公开(公告)号：JPH07183862A

公开(公告)日：1995-07-21

申请号：JP32486993

申请日：1993-12-22

Applicant: TOSHIBA CORP

Inventor： MATSUSHIMA TOMOKO ,  SERIZAWA MUTSUMI ,  OGURA KOJI ,  NAKAJIMA NOBUYASU

IPC: H04L1/00 ,  H04J1/00 ,  H04J11/00 ,  H04L27/18

Abstract: PURPOSE:To realize an error correcting method where the speed-up of transmission speed is easy and the degradation of the error ratio of a frequency selective phasing is small, in an FDM transmission system. CONSTITUTION:A transmitter 301 is composed of (n) error correction encoders 101-1 to 101-n (n is >=2) performing an error correction encoding for transmission data, a mapping circuit 102 outputting m of data arranged so as to disperse each of n encoded data sequence on a frequency axis or a time axis and an FDM modulator 103 outputting signal where m of data is modulated into each of m carrier waves and is multiplexed. Therefore, plural error correction encoders 101-1 to 101-n and a decoder are provided, the application of high transmission speed to a system is easy. Because the burst error by a selective fading is effectively dispersed by a mapping means, the reliability of decoded data is improved. When a user receives only part of data in a multiconnection and a broadcasting system, the miniaturization of a receiver and low power consumption is performed.

公开(公告)号：JPH05183505A

公开(公告)日：1993-07-23

申请号：JP34744091

申请日：1991-12-27

Applicant: TOSHIBA CORP

Inventor： NOUJIN KATSUYA ,  SERIZAWA MUTSUMI

IPC: H04W76/02 ,  H04B7/26 ,  H04W72/04 ,  H04W72/08 ,  H04W84/08

Abstract: PURPOSE:To make a lock time of a PLL synthesizer of a mobile station small and to make the size of the mobile station small when only a voiced part is sent in the digital mobile communication. CONSTITUTION:A channel number and a slot number allocated most closely are stored by a base station 102 and the channel number and the slot number are decided by referencing the channel number and the slot number stored when the channel number and the slot number are allocated in the mobile station 101. Thus, it is possible to attain high speed synchronization of a synchronization section and high speed tuning of the synthesizer, the transmission delay is reduced and the the voice with high quality is sent and miniaturization is attained.

公开(公告)号：JPH05181499A

公开(公告)日：1993-07-23

申请号：JP34572291

申请日：1991-12-27

Applicant: TOSHIBA CORP

Inventor： NOUJIN KATSUYA ,  SERIZAWA MUTSUMI ,  SUGAWARA TSUTOMU ,  TANIMOTO HIROSHI

IPC: G10L19/02 ,  G10L19/00 ,  G10L19/12 ,  H04B14/04

Abstract: PURPOSE:To reduce the size of the device by efficiently transmitting a speech signal by converting the signal into optimum codes. CONSTITUTION:The speech code book of an opposite communication party is loaded in a receiving code book memory 107 from a code book library 106. Further, the code book of a user is loaded in a transmitting code book memory 108 from the code book library 106. Then the speech signal is encoded by referring to the code book loaded in the transmitting code book memory 108 and decoded by referring to the code book loaded in the receiving code book memory 107.

公开(公告)号：JPH04270524A

公开(公告)日：1992-09-25

申请号：JP69991

申请日：1991-01-08

Applicant: TOSHIBA CORP

Inventor： SERIZAWA MUTSUMI ,  NAMEKATA MINORU

IPC: H04B1/74 ,  H04L1/22 ,  H04L27/14

Abstract: PURPOSE:To reduce an error rate while reducing power consumption and to suffice both a long communication available time and the expansion of the service area with one charging of batteries. CONSTITUTION:The receiver and demodulator is provided with a 1st detection demodulator 4 demodulating a reception signal, a 2nd detection demodulator 5 with a deteriorated S/N versus BBR characteristic and less power consumption than those of a 2nd detection demodulator 5 and a reliability measuring device 3 measuring the reliability of a reception signal, either the 1st demodulation detector 4 or the 2nd detection demodulator 5 is operated based on the measuring result by the reliability measuring device 3 and when at least the 2nd detection demodulator 5 is in operation, the power consumption of the 1st detection demodulator 4 is stopped.

公开(公告)号：JPH04207529A

公开(公告)日：1992-07-29

申请号：JP33562390

申请日：1990-11-30

Applicant: TOSHIBA CORP

Inventor： SERIZAWA MUTSUMI ,  OGURA KOJI ,  NAMEKATA MINORU ,  SOEYA MIYUKI

IPC: H04B7/15

Abstract: PURPOSE:To attain excellent communication by providing a relative speed calculation means, a frequency offset calculation means and a communication frequency inverse correction means in the system. CONSTITUTION:A frequency offset calculation means 14 obtains a relative speed between a satellite and a mobile station terminal equipment based on an orbit and a speed of the satellite stored in a storage device 11, a current time represented by a timer 12 and a position 13 of the mobile station terminal equipment to calculate a frequency offset thereby. When a signal is sent from the mobile station terminal equipment to a control station, the signal from the mobile station terminal equipment received by an antenna 31 is corrected by a frequency offset DELTAf corresponding to the relative speed between the satellite and the mobile station terminal equipment and applies demodulation and re- modulation and sends the result to the control station. Thus, the communication with excellent quality in which the effect of the frequency offset is minimized is implemented in the satellite communication using a low orbit satellite.

公开(公告)号：JPH0472932A

公开(公告)日：1992-03-06

申请号：JP18421790

申请日：1990-07-13

Applicant: TOSHIBA CORP

Inventor： OGURA KOJI ,  SERIZAWA MUTSUMI

IPC: H04J3/00 ,  H04J3/06 ,  H04L7/08

Abstract: PURPOSE:To reduce mis-detection of synchronization information by discriminating a time position coincident most with a maximum correlation or as the result of comparison among signals divided into a prescribed length as the position in which the synchronization information is in existence. CONSTITUTION:The correlation between a reception signal inputted from a reception signal input terminal 101 and a signal pattern stored in a pattern memory 102 is calculated by a correlation device 103. The correlation value is inputted to a maximum time position detection circuit. The maximum time position detection circuit observes the said correlation for one frame and detects and outputs a time position when the correlation value is maximum in one frame. The time position giving the maximum correlation in the frame outputted from the maximum time position detection circuit is inputted to a frame synchronization discrimination circuit 105.

公开(公告)号：JPH03278747A

公开(公告)日：1991-12-10

申请号：JP8003490

申请日：1990-03-28

Applicant: TOSHIBA CORP

Inventor： OGURA KOJI ,  SERIZAWA MUTSUMI

IPC: H04L27/227 ,  H04L27/22

Abstract: PURPOSE:To surely eliminate a frequency offset even in the case of a burst signal by giving various frequency conversion outputs obtained from a sweep-out oscillating frequency of a local oscillator to a matched filter so as to detect the quantity of the frequency offset thereby eliminating the frequency offset. CONSTITUTION:The quantity of a frequency offset is detected by giving various frequency conversion outputs obtained by sweeping out an oscillating frequency of a local oscillator 104 to a matched filter 106 and the frequency offset is eliminated based on the result. Thus, the solution of the frequency offset is surely obtained by a prescribed step number by sweeping out the oscillating frequency of the local oscillator 104 at one step for each burst and the frequency offset is eliminated. Thus, the frequency offset even in the case of a burst signal is surely eliminated.

公开(公告)号：JPH03276926A

公开(公告)日：1991-12-09

申请号：JP7565090

申请日：1990-03-27

Applicant: TOSHIBA CORP

Inventor： NAMEKATA MINORU ,  OGURA KOJI ,  SAKAKIBARA KATSUMI ,  SERIZAWA MUTSUMI

IPC: H04B7/005

Abstract: PURPOSE:To detect a convergence error representing the state of a malfunction of an equalizer by detecting a signal outputted from a discrimination feedback equalizer with a phase detection means and comparing the difference of adjacent symbols to be outputted with a reference signal. CONSTITUTION:Each symbol outputted from the discrimination feedback equalizer 24 is inputted to a phase detection circuit 14. A phase detection circuit 24 detects the phase of each symbol. A phase difference detection circuit 19 obtains a phase difference between the detected phase and that of a preceding symbol. moreover the phase difference between symbols is synthesized by a phase difference synthesis circuit 20. The output of the phase difference synthesis circuit 20 is inputted to a pattern comparator 22. The pattern comparator 22 compares the output with a fixed pattern generated in a pattern generator 21 and decides it to be error in the case of coincidence, thereby detecting the convergence error of the equalizer.

公开(公告)号：JPH03257580A

公开(公告)日：1991-11-18

申请号：JP5487590

申请日：1990-03-08

Applicant: TOSHIBA CORP

Inventor： SAKAKIBARA KATSUMI ,  SERIZAWA MUTSUMI ,  OGURA KOJI

IPC: G06F17/16

Abstract: PURPOSE:To increase the arithmetic processing speed of the complex numbers by providing the buses on two inputs of a complex number multiplier. CONSTITUTION:A complex multiplier 127 inputs the 1st and 2nd complex numbers and outputs the multiplication result of both multiplex numbers as a 3rd complex number. A cumulative adder 128 uses the 1st input of the multiplier 127, a 1st bus 123 connected to a 1st storage part 121, the 2nd input of the multiplier 127, a 2nd bus 124 connected to a 2nd storage part 122, and the output of the multiplier 127 as the inputs and adds cumulatively these inputs to each other to output this addition result. A multiplexer 129 selects the output of the multiplier 127 or the output of the adder 128. Then a demultiplexer 130 sends the output of the multiplexer 129 to the bus 123 or 124, and a control part 102 controls each part. In such a constitution, the arithmetic processing speed of the complex numbers can be increased.

公开(公告)号：JPH03155228A

公开(公告)日：1991-07-03

申请号：JP29381889

申请日：1989-11-14

Applicant: TOSHIBA CORP

Inventor： NOUJIN KATSUYA ,  SAKAKIBARA KATSUMI ,  SERIZAWA MUTSUMI ,  OGURA KOJI

IPC: H04B7/08 ,  H04L25/03

Abstract: PURPOSE:To improve the accuracy of measurement of an error rate by comparing the mean values of the intensity of an error signal generated by the adaptive automatic equalization of each receiving system respectively and selecting a receiving system whose mean value of the intensity is minimum. CONSTITUTION:The error signal intensity calculated by mean value arithmetic sections 50a-50c of 1st-3rd receiving systems, that is, the mean value of the power of an error signal is compared by a comparison section 60 every time a training mode period of the signals received by each receiving system is finished, and a receiving system whose mean value of the power of the error signal is least is selected as the receiving system with the best reception quality. Then a switching section 70 is controlled based on the result of selection and a digital signal from a receiving system selected by the comparison section 60 is outputted as a final receiving signal.