公开(公告)号：WO2008012846A1

公开(公告)日：2008-01-31

申请号：PCT/IT2006/000576

申请日：2006-07-26

Applicant: STMICROELECTRONICS S.R.L. ,  MERASSI, Angelo ,  CORTESE, Mario, Francesco ,  VIOLA, Fultio ,  SIMONI, Barbara ,  RUSCONI CLERICI BELTRAMI, Andrea

Inventor： MERASSI, Angelo ,  CORTESE, Mario, Francesco ,  VIOLA, Fultio ,  SIMONI, Barbara ,  RUSCONI CLERICI BELTRAMI, Andrea

IPC: B81B7/00 ,  G01P15/08

CPC classification number: B81B3/0051 ,  B81B2201/0235 ,  B81B2201/0242 ,  G01P15/08 ,  G01P15/125 ,  G01P2015/0828

Abstract: Described herein is a microelectromechanical device (10) having a mobile mass (12) that undergoes a movement, in particular a spurious movement, in a first direction (z) in response to an external event; the device moreover has a stopper structure (14, 20) configured so as to stop said spurious movement. In particular, a stopper element (20) is fixedly coupled to the mobile mass (12) and is configured so as to abut against a stopper mass (14) in response to the spurious movement, thereby stopping it. In detail, the stopper element (20) is arranged on the opposite side of the stopper mass (14) with respect to a direction of the spurious movement, protrudes from the space occupied by the mobile mass (12) and extends in the space occupied by the stopper mass, in the first direction (z).

Abstract translation: 这里描述的是具有响应于外部事件在第一方向（z）上经历移动，特别是杂散运动的移动质量块（12）的微机电装置（10）。 该装置还具有构造成停止所述杂散运动的止动结构（14,20）。 特别地，止动元件（20）固定地联接到移动质量块（12），并且被配置为响应于伪运动而抵靠止动块（14），从而停止它。 详细地说，止动元件（20）相对于杂散运动的方向设置在止动块（14）的相对侧上，从可移动质量块（12）所占据的空间突出，并在占据的空间 通过止动块在第一方向（z）上。

公开(公告)号：WO2007122646A1

公开(公告)日：2007-11-01

申请号：PCT/IT2006/000273

申请日：2006-04-21

Applicant: STMICROELECTRONICS S.R.L. ,  GUARNERA, Alfio ,  SAGGIO, Mario, Giuseppe ,  FRISINA, Ferruccio

Inventor： GUARNERA, Alfio ,  SAGGIO, Mario, Giuseppe ,  FRISINA, Ferruccio

IPC: H01L29/06 ,  H01L29/78 ,  H01L21/336 ,  H01L29/417 ,  H01L29/08 ,  H01L21/20 ,  H01L21/324 ,  H01L29/10 ,  H01L29/739 ,  H01L29/861 ,  H01L29/872

CPC classification number: H01L29/0634 ,  H01L21/2003 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/872

Abstract: A process for manufacturing a power semiconductor device (25; 35) envisages the steps of: providing a body of semiconductor material (3) having a top surface (4) and having a first conductivity; forming columnar regions (6) having a second type of conductivity within the body of semiconductor material (3), and surface extensions (10) of the columnar regions (6) above the top surface (4); and forming doped regions (19, 20) having the second type of conductivity, in the proximity of the top surface (4) and in contact with the columnar regions (6). The doped regions (19, 20) are formed at least partially within the surface extensions (10) of the columnar regions (6); the surface extensions (10) and the doped regions (20) have a non-planar surface pattern, in particular with a substantially V-shaped groove.

Abstract translation: 一种用于制造功率半导体器件（25; 35）的工艺设想了以下步骤：提供具有顶表面（4）并具有第一导电性的半导体材料体（3）; 在所述半导体材料（3）的主体内形成具有第二导电类型的柱状区域（6）以及所述顶表面（4）上方的所述柱状区域（6）的表面延伸部（10）。 以及在所述顶表面（4）附近形成具有所述第二导电类型的掺杂区域（19,20）并与所述柱状区域（6）接触。 掺杂区域（19,20）至少部分地形成在柱状区域（6）的表面延伸部分（10）内; 表面延伸部（10）和掺杂区域（20）具有非平面的表面图案，特别是具有大致V形的凹槽。

公开(公告)号：WO2007091281A1

公开(公告)日：2007-08-16

申请号：PCT/IT2006/000062

申请日：2006-02-06

Applicant: STMICROELECTRONICS S.R.L. ,  POMPA, Pier, Paolo ,  FERRARA, Francesco ,  RINALDI, Ross

Inventor： POMPA, Pier, Paolo ,  FERRARA, Francesco ,  RINALDI, Ross

IPC: G01N21/00 ,  G01N33/00

CPC classification number: G01N21/7703 ,  B01L3/502715 ,  B01L7/525 ,  B01L2300/0654 ,  B01L2300/0819 ,  B01L2300/0877 ,  B01L2300/1827 ,  G01N21/6428 ,  G01N21/6452 ,  G01N21/6456 ,  G01N21/648 ,  G01N2021/7786

Abstract: A chip for nucleic acid analysis includes a body (2, 9) , in which a detection chamber (7) is formed for accommodating nucleic acid probes (12, 12') . A waveguide (8) is integrated in the body (2, 9) is and is arranged at the bottom of the detection chamber (7) so that an evanescent wave (EW) , produced at an interface (8a) of the waveguide (8) when a light radiation is conveyed within the waveguide (8), is irradiated towards the inside of the detection chamber (7) . An apparatus for inspection of nucleic acid probes includes: a holder (22) , on which a chip (1) for nucleic acid analysis is loaded, the chip containing nucleic acid probes (12, 12'); a light source (24) for supplying an excitation radiation to the nucleic acid probes (12, 12'); and an optical sensor (25) arranged so as to receive radiation coming from the nucleic acid probes (12, 12') .

Abstract translation: 用于核酸分析的芯片包括其中形成有用于容纳核酸探针（12,12'）的检测室（7）的主体（2,9）。 集成在体（2,9）中的波导（8）被布置在检测室（7）的底部，使得在波导（8）的界面（8a）处产生的ev逝波（EW） ）当在波导（8）内传送光辐射时朝向检测室（7）的内部照射。 用于检查核酸探针的装置包括：载体上用于核酸分析的芯片（1）的保持器（22），含芯片的核酸探针（12,12'）; 用于向核酸探针（12,12'）提供激发辐射的光源（24）; 以及布置成接收来自所述核酸探针（12,12'）的辐射的光学传感器（25）。

公开(公告)号：WO2007020016A1

公开(公告)日：2007-02-22

申请号：PCT/EP2006/007964

申请日：2006-08-11

Applicant: STMICROELECTRONICS S.R.L. ,  MICCICHE, Monica ,  GRIMALDI, Antonio, Giuseppe ,  ARCURI, Luigi

Inventor： MICCICHE, Monica ,  GRIMALDI, Antonio, Giuseppe ,  ARCURI, Luigi

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7811 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/7802

Abstract: Process for manufacturing a multi-drain power electronic device (30) characterised in that it comprises the following steps: forming a first semiconductor layer (21) of the first type of conductivity - forming at least a second semiconductor layer (23) of a second type of conductivity on the first semiconductor layer (21), forming, in this at least a second semiconductor layer (23), a first plurality of implanted regions (D3) of the first type of conductivity forming implanted body regions (40) of the second type of conductivity in portions of said second semiconductor layer (23) free from said first plurality of implanted regions (D3), - carrying out a thermal diffusion process so that the first plurality of implanted regions (D3) form a first plurality of electrically continuous implanted column regions (D) of the first type of conductivity along this at least a second semiconductor layer (23) and in electric contact with the first semiconductor layer (21).

Abstract translation: 一种用于制造多漏电功率电子器件（30）的方法，其特征在于，它包括以下步骤：形成第一类型导电的第一半导体层（21），形成第二半导体层的第二半导体层（23） 在第一半导体层（21）上形成导电性类型，在该至少第二半导体层（23）中形成第一导电形成植入体区域（40）的第一多个注入区域（D3） 在所述第二半导体层（23）的不含所述第一多个注入区域（D3）的部分中的第二类型的导电性， - 执行热扩散处理，使得所述第一多个注入区域（D3）形成第一多个电 沿着该至少第二半导体层（23）与第一半导体层（21）电接触的第一导电类型的连续注入的列区域（D）。

公开(公告)号：WO2007017515A3

公开(公告)日：2007-02-15

申请号：PCT/EP2006/065163

申请日：2006-08-08

Applicant: STMICROELECTRONICS S.R.L. ,  FONTANELLA, Luca ,  PASOLINI, Fabio ,  VIGNA, Benedetto ,  CHIESA, Enrico

Inventor： FONTANELLA, Luca ,  PASOLINI, Fabio ,  VIGNA, Benedetto ,  CHIESA, Enrico

IPC: G06F3/043

Abstract: In a device (2) for determining the position (P 1 (X, y) ) of a touch on a contact surface (Ia) , a plurality of vibration sensors (4) are configured to detect mechanical vibrations (9) generated by the touch on the contact surface (1a) and to generate corresponding vibration signals, and a processing circuit (6) is connected to the vibration sensors (4) and is configured to determine the touch position (P 1 (x, y) ) via a time-of-f light algorithm, based on differences between times of detection (t 1 , t 2 , t 3 ) of the mechanical vibrations (9) by the vibration sensors (4) .

公开(公告)号：WO2007012053A1

公开(公告)日：2007-01-25

申请号：PCT/US2006/028256

申请日：2006-07-20

Applicant: STMICROELECTRONICS, S.R.L. ,  THE REGENTS OF THE UNIVERSITY OF CALIFORNIA ,  SITI, Massimiliano ,  FITZ, Michael, P.

Inventor： SITI, Massimiliano ,  FITZ, Michael, P.

IPC: H04L1/06 ,  H04L25/03 ,  H04L1/00

CPC classification number: H04L25/06 ,  H04L1/0052 ,  H04L1/0054 ,  H04L1/06 ,  H04L25/03292 ,  H04L25/03331 ,  H04L2025/03414

Abstract: A method (200a-200b), apparatus (104), and computer program for detecting sequences of digitally modulated symbols transmitted by multiple sources (102, 102a-102t) are provided. A real-domain representation that separately treats in-phase and quadrature components of a received vector, channel gains, and a transmitted vector transmitted by the multiple sources (102, 102a-102t) is determined. The real-domain representation is processed to obtain a triangular matrix. In addition, at least one of the following is performed: (i) hard decision detection of a transmitted sequence and demapping of corresponding bits based on a reduced complexity search of a number of transmit sequences, and (ii) generation of bit soft-output values based on the reduced complexity search of the number of transmit sequences. The reduced complexity search is based on the triangular matrix.

Abstract translation: 提供了一种用于检测由多个源（102,102-102t）发送的数字调制码元的序列的方法（200a-200b），装置（104）和计算机程序。 确定单独处理接收矢量的同相和正交分量，信道增益和由多个源（102,102-102t）发送的发射矢量的实域表示。 处理真实域表示以获得三角矩阵。 另外，执行以下中的至少一个：（i）基于多个发送序列的降低的复杂度搜索，发送序列的硬判决检测和相应比特的解映射，以及（ii）产生位软输出 基于传输序列数量的复杂度降低的搜索值。 降低的复杂度搜索基于三角矩阵。

公开(公告)号：WO2007010570A1

公开(公告)日：2007-01-25

申请号：PCT/IT2005/000431

申请日：2005-07-22

Applicant: STMICROELECTRONICS S.R.L. ,  RICOTTI, Giulio ,  MORELLI, Marco ,  DELLA TORRE, Luigi ,  VITALI, Andrea, Lorenzo ,  MASTROMATTEO, Ubaldo

Inventor： RICOTTI, Giulio ,  MORELLI, Marco ,  DELLA TORRE, Luigi ,  VITALI, Andrea, Lorenzo ,  MASTROMATTEO, Ubaldo

IPC: G01L9/06 ,  G01L19/06

CPC classification number: G01L9/0054 ,  G01L9/0045 ,  G01L15/00

Abstract: In a pressure sensor (15) with double measuring scale: a monolithic body (16) of semiconductor material has a first main surface (16a), a bulk region (17) and a sensitive portion (33) upon which pressure (P) acts; a cavity (18) is formed in the monolithic body (16) and is separated from the first main surface (16a) by a membrane (19), which is flexible and deformable as a function of the pressure (P), and is arranged inside the sensitive portion (33) and is surrounded by the bulk region (17); a low-pressure detecting element (28) of the piezoresistive type, sensitive to first values of pressure (P), is integrated in the membrane (19) and has a variable resistance as a function of the deformation of the membrane (19); in addition, a high-pressure detecting element (29), also of a piezoresistive type, is formed in the bulk region (17) inside the sensitive portion (33) and has a variable resistance as a function of the pressure (P). The high­pressure detecting element (29) is sensitive to second values of pressure (P).

Abstract translation: 在具有双重测量标尺的压力传感器（15）中：半导体材料的整体（16）具有第一主表面（16a），主体区域（17）和压力（P）作用于其上的敏感部分 ; 在整体式主体（16）中形成空腔（18），并且通过膜（19）与第一主表面（16a）分离，该膜（19）作为压力（P）的函数是柔性和可变形的，并且布置 在所述敏感部分（33）的内部并且被所述主体区域（17）包围; 对第一压力值（P）敏感的压阻型低压检测元件（28）集成在膜（19）中，并具有作为膜（19）的变形的函数的可变电阻; 此外，在敏感部分（33）内的主体区域（17）中形成压阻型高压检测元件（29），并具有作为压力（P）的函数的可变电阻。 高压检测元件（29）对第二压力值（P）敏感。

公开(公告)号：WO2007006764A2

公开(公告)日：2007-01-18

申请号：PCT/EP2006/064035

申请日：2006-07-07

Applicant: STMICROELECTRONICS S.r.l. ,  ARENA, Giuseppe ,  DONATO, Caterina ,  CAMALLERI, Cateno Marco ,  MAGRI', Angelo

Inventor： ARENA, Giuseppe ,  DONATO, Caterina ,  CAMALLERI, Cateno Marco ,  MAGRI', Angelo

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/423 ,  H01L29/51

CPC classification number: H01L29/7813 ,  H01L29/0623 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/4933 ,  H01L29/511 ,  H01L29/66734

Abstract: A trench (5) is formed in a semiconductor body (2); the side walls and the bottom of the trench are covered with a first dielectric material layer (9); the trench (5) is filled with a second dielectric material layer (10); the first and the second dielectric material layers (9, 10) are etched via a partial, simultaneous and controlled etching such that the dielectric materials have similar etching rates; a gate-oxide layer (13) having a thickness smaller than the first dielectric material layer (9) is deposited on the walls of the trench (5); a gate region (14) of conductive material is formed within the trench (5); and body regions (7) and source regions (8) are formed within the semiconductor body (2), at the sides of and insulated from the gate region (14). Thereby, the gate region (14) extends only on top of the remaining portions of the first and second dielectric material layers (9, 10).

Abstract translation: 沟槽（5）形成在半导体本体（2）中; 沟槽的侧壁和底部被第一介电材料层（9）覆盖; 沟槽（5）填充有第二电介质层（10）; 通过部分，同时和受控的蚀刻蚀刻第一和第二介电材料层（9,10），使得介电材料具有相似的蚀刻速率; 在沟槽（5）的壁上沉积具有小于第一介电材料层（9）的厚度的栅极 - 氧化物层（13）。 在沟槽（5）内形成导电材料的栅区（14）; 并且在半导体本体（2）中，在栅极区域（14）的侧面和与栅极区域（14）绝缘的位置上形成有主体区域（7）和源极区域（8）。 因此，栅极区域（14）仅在第一和第二介电材料层（9,10）的剩余部分的顶部延伸。

公开(公告)号：WO2006128896A1

公开(公告)日：2006-12-07

申请号：PCT/EP2006/062812

申请日：2006-06-01

Applicant: STMICROELECTRONICS S.R.L. ,  PELLIZZER, Fabio ,  PIROVANO, Agostino

Inventor： PELLIZZER, Fabio ,  PIROVANO, Agostino

IPC: G11C11/56

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0078 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2213/79

Abstract: A method and apparatus for programming a phase change memory cell (2) is disclosed. A phase change memory cell (2) includes a memory element (10) of a phase change material having a first state ("11"), in which the phase change material is crystalline and has a minimum resistance level, a second state ("00") in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states with resistance levels there between. The method includes using programming pulses to program the phase change memory cell (2) in either the set, reset, or one of the intermediate states. To program in the intermediate states, a programming pulse creates a crystalline percolation path having an average diameter (D) through amorphous phase change material and a second programming pulse modifies the diameter (D) of the crystalline percolation path to program the phase change memory cell to the proper current level.

Abstract translation: 公开了一种用于编程相变存储单元（2）的方法和装置。 相变存储单元（2）包括具有第一状态（“11”）的相变材料的存储元件（10），其中所述相变材料是晶体并且具有最小电阻水平，第二状态（“ 00“），其中相变材料是非晶体并且具有最大电阻水平，以及在其间具有电阻水平的多个中间状态。 该方法包括使用编程脉冲来将相变存储器单元（2）编程在设置，复位或中间状态之一中。 为了在中间状态下进行编程，编程脉冲通过非晶相变材料产生具有平均直径（D）的结晶渗透路径，第二编程脉冲改变晶体渗滤路径的直径（D）以编程相变存储器单元 达到适当的当前水平。

公开(公告)号：WO2006122957A2

公开(公告)日：2006-11-23

申请号：PCT/EP2006/062394

申请日：2006-05-17

Applicant: STMicroelectronics S.r.l. ,  CURRO', Giuseppe

Inventor： CURRO', Giuseppe

IPC: H01L29/78 ,  H01L29/417 ,  H01L21/336 ,  H01L29/06

CPC classification number: H01L29/7802 ,  H01L29/0696 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66719 ,  H01L29/66727

Abstract: MOSFET device formed in a semiconductor layer (12) overlaid by an insulated-gate structure (13, 14, 21) having at least two gate electrodes (14), of semiconductor material, which extend at a distance from one another and delimit between them a strip-shaped opening (15). The semiconductor layer accommodates a strip-shaped body region (19), which in turn accommodates a source region (20). A source-contact metal region (29) extends at least partially in the opening (15) and is in electrical contact with the body region (19) and the source structure (20, 25). The opening (15) is formed by elongated windows (15a) and contact cells (18) extending between pairs of consecutive elongated windows. The elongated windows (15) are filled with dielectric spacer material (26), and the metal contact structure (29) has first portions extending above the opening (15) at the elongated windows (15a) and second portions extending within the opening at the contact cells (18) and in direct electrical contact with the source structure (20, 25).

Abstract translation: MOSFET器件形成在由绝缘栅结构（13,14,21）重叠的半导体层（12）中，所述绝缘栅极结构（13,14,21）具有半导体材料的至少两个栅电极（14），它们彼此间隔开并在它们之间限定 带状开口（15）。 半导体层容纳条形体区域（19），其又容纳源区域（20）。 源极接触金属区域（29）至少部分地延伸在开口（15）中并且与体区域（19）和源结构（20,25）电接触。 开口（15）由细长的窗口（15a）和在成对的连续细长窗口之间延伸的接触单元（18）形成。 细长的窗口（15）填充有介电隔离材料（26），并且金属接触结构（29）具有在细长窗口（15a）处在开口（15）上方延伸的第一部分，并且在开口 接触电池（18）并与源结构（20,25）直接电接触。