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91.
公开(公告)号:JP3563283B2
公开(公告)日:2004-09-08
申请号:JP37288498
申请日:1998-12-28
Inventor: トロリラ ギレルモ
IPC: G01N23/225 , G01R31/00 , G01R31/302 , G01R31/305 , G09G3/00 , H01J37/00 , H01J37/28
CPC classification number: G09G3/006 , G01R31/305 , H01J37/00 , H01J2237/2813 , H01J2237/2817
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公开(公告)号:KR1020170121698A
公开(公告)日:2017-11-02
申请号:KR1020170049840
申请日:2017-04-18
Applicant: 도요타지도샤가부시키가이샤
Inventor: 이이즈카가즈타카
IPC: C23C16/458 , C23C16/44
CPC classification number: C23C16/50 , C23C16/042 , C23C16/4409 , C23C16/4412 , C23C16/4585 , C23C16/54 , H01J37/00
Abstract: 워크의일부에성막을행하는성막장치는, 워크의상방에배치되고, 워크의성막대상부분으로부터보아상방으로오목하게들어간제1 오목부와제1 오목부의주위에배치된제1 평면부를구비하는제1 형과, 제1 형에대향하여워크의하방에배치되고, 제1 평면부에대응하는부분에제2 평면부를구비하는제2 형을갖는성막용기와, 제1 평면부와워크사이에배치되고, 워크를제1 평면부로부터이격시킨상태에서제1 평면부및 워크에접촉하는제1 시일부재와, 제2 평면부와워크사이에배치되고, 워크를제2 평면부로부터이격시킨상태에서제2 평면부및 워크에접촉하는제2 시일부재를구비한다. 제2 시일부재는, 워크의하면에설치되어있다.
Abstract translation: 宣称该膜对被布置在工件上方的工作的一部分进行成膜,具有第一凹部成从所述工件的所述成膜对象部分与设置在所述第一平面部部分中的第一凹部向上凹陷的孔形成装置 被布置在所述第一类型和相对所述工件的第一类型的下侧,所述第二以及具有平坦部的第二类型的膜形成容器之间的布置中,与工件的部分处与所述第一平面部与第一平面部 和第一密封构件,其接触所述第一平面部分和的状态下的工作,其中分离从第一平面部的工件,一个第二设置在平面表面和工作,在从第二平面部离开的状态之间的工作 并且第二密封构件接触第二平坦表面部分和工件。 第二密封件设置在工件的表面上。
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93.
公开(公告)号:KR1020160014005A
公开(公告)日:2016-02-05
申请号:KR1020157036617
申请日:2014-03-31
Applicant: 차우 타이 푹 쥬얼리 컴퍼니 리미티드
CPC classification number: B01J19/081 , B41M3/14 , C30B29/04 , C30B29/16 , C30B29/20 , C30B29/34 , C30B33/04 , H01J37/00 , H01J37/3178 , Y10T428/24355
Abstract: 고체상태재료의연마된각면의외면위에하나혹은그 이상의돌출부를형성하는방법으로, 고체상태재료의상부면재료가돌출하도록고체상태재료의연마된각면의외면을향해집속된불활성가스이온빔을국소적으로조사하는단계를포함하며, 상기집속된불활성가스이온빔에서조사되는집속된불활성가스이온들이상기고체상태재료의상기연마된각면의외면을침투하고, 조사되는집속된불활성가스이온들이상기외면아래의고체상태재료의고체상태결정격자내에서일정압력으로팽창변형을야기하여, 상기고체상태재료의연마된각면의외면상에돌출부를형성하는하나혹은그 이상의돌출부형성방법이개시되어있다.
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公开(公告)号:KR1020130100993A
公开(公告)日:2013-09-12
申请号:KR1020137004298
申请日:2011-06-14
Applicant: 트럼프 헛팅거 게엠베하 + 코 카게
Inventor: 리히터울리히
IPC: H01J37/32
CPC classification number: H01J37/32064 , H01J37/32018 , H01J37/32045 , H01J37/32935 , H01J37/00 , H01J37/32
Abstract: 본 발명은 가스 방전실(5)에서 아크를 소거하는 방법에 관한 것으로서, 가스 방전실(5)에 전력이 공급되고, 가스 방전실(5)에는 제1 방향의 전류 흐름 및 제2의 역방향의 전류 흐름 양측 모두에 의해 가스 방전이 발생된다. 아크가 검출될 때 가스 방전실(5)로의 전력 공급이 차단되고, 가스 방전실(5)로의 공급 선로(17, 19)에 및/또는 가스 방전실(5)에 있는 잔여 에너지가 에너지 저장부(30)에 공급된다.
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公开(公告)号:US11843041B2
公开(公告)日:2023-12-12
申请号:US17856892
申请日:2022-07-01
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yi-Chen Lo , Jung-Hao Chang , Li-Te Lin , Pinyen Lin
IPC: H01L27/088 , H01L27/12 , H01L29/78 , H01L29/66 , H01L29/49 , H01L29/51 , H01L29/423 , H01L21/3065 , H01L21/02 , H01L21/28 , H01L21/67 , H01J37/00 , H01L21/8234 , H01L21/311 , H01L21/3213 , H01L21/84 , H01L29/165
CPC classification number: H01L29/517 , H01J37/00 , H01L21/0228 , H01L21/02274 , H01L21/28088 , H01L21/3065 , H01L21/31122 , H01L21/32136 , H01L21/67069 , H01L21/823431 , H01L27/0886 , H01L29/42376 , H01L29/6681 , H01L29/66545 , H01L29/66553 , H01L29/785 , H01L21/845 , H01L27/1211 , H01L29/165 , H01L29/4966 , H01L29/7848
Abstract: A semiconductor device includes first and second gate structures over a substrate, the first gate structure has a first width that is smaller than a second width of the second gate structure, in which a lower portion of the first gate structure having a first work-function material (WFM) layer, the first WFM layer having a top surface, a lower portion of the second gate structure having a second WFM layer, the second WFM layer having a top surface. A first gate electrode is disposed over the first WFM layer and a second gate electrode has a lower portion disposed in the second WFM layer, in which the first gate electrode has a first width that is smaller than a second width of the second gate electrode, and wherein the top surface of the second WFM layer is at a level below a top surface of the second gate electrode.
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96.
公开(公告)号:US20190252217A1
公开(公告)日:2019-08-15
申请号:US16394089
申请日:2019-04-25
Applicant: Tokyo Electron Limited
Inventor: Masahiro Tabata , Sho Kumakura
IPC: H01L21/67 , H01J37/00 , H01L21/311
CPC classification number: H01L21/67069 , H01J37/00 , H01J37/32449 , H01J2237/334 , H01L21/31116 , H01L21/67
Abstract: Generation of a deposit can be suppressed and high selectivity can be acquired when etching a first region made of silicon nitride selectively against a second region made of silicon oxide. A method includes preparing a processing target object having the first region and the second region within a chamber provided in a chamber main body of a plasma processing apparatus; generating plasma of a first gas including a gas containing hydrogen within the chamber to form a modified region by modifying a part of the first region with active species of the hydrogen; and generating plasma of a second gas including a gas containing fluorine within the chamber to remove the modified region with active species of the fluorine.
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公开(公告)号:US20190109000A1
公开(公告)日:2019-04-11
申请号:US15729853
申请日:2017-10-11
Applicant: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
Inventor: Aiden Alexander Martin
CPC classification number: H01L21/02529 , C23C14/0635 , C23C14/221 , H01J37/00 , H01L21/67103 , H01L21/67213 , H01L21/67253
Abstract: A method for produce a silicon-carbide film by admitting a gaseous silicon-carbide precursor into a vacuum chamber containing a substrate and directing an electron beam into the vacuum chamber onto to the surface of the substrate. The electron beam dissociates the gaseous silicon-carbide precursor at the surface of the substrate creating non-volatile fragments that bind to the substrate surface forming a silicon-carbide film.
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公开(公告)号:US20180243789A1
公开(公告)日:2018-08-30
申请号:US15750815
申请日:2017-03-31
Applicant: LG CHEM, LTD.
Inventor: Hee Wang YANG , Jang Yeon HWANG , Seong Hwan LEE
CPC classification number: B05D3/148 , B05D7/04 , B05D7/26 , B05D7/54 , B32B7/02 , B32B27/08 , B32B27/18 , B32B27/28 , B32B38/0008 , B32B2457/12 , B32B2457/20 , C08J7/042 , C08J7/123 , C08J2367/02 , C08J2433/04 , C08J2435/02 , C08J2483/16 , H01J37/00
Abstract: The present application relates to a method for preparing a barrier film. The present application can provide a method for preparing a barrier film having excellent barrier characteristics and optical performances. The barrier film produced by the method of the present application can be effectively used not only for packaging materials of as foods or medicines, and the like, but also for various applications, such as members for FPDs (flat panel displays) such as LCDs (Liquid Crystal Displays) or solar cells, substrates for electronic papers or OLEDs (Organic Light Emitting Diodes), or sealing films.
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99.
公开(公告)号:US20180193814A1
公开(公告)日:2018-07-12
申请号:US15905426
申请日:2018-02-26
Applicant: Chow Tai Fook Jewellery Company Limited
Inventor: Koon Chung HUI , Ho CHING , Ching Tom KONG
CPC classification number: B01J19/081 , B41M3/14 , C30B29/04 , C30B29/16 , C30B29/20 , C30B29/34 , C30B33/04 , H01J37/00 , H01J37/317 , H01J2237/31713 , H01J2237/31737 , Y10T428/24355
Abstract: A method of forming one or more protrusions on an outer surface of a polished face of a solid state material, said method including the step of applying focused inert gas ion beam local irradiation towards an outer surface of a polished facet of a solid state material in a way of protruding top surface material; wherein irradiated focused inert gas ions from said focused inert gas ion bean penetrate the outer surface of said polished facet of said solid state material; and wherein irradiated focused inert gas ions cause expansive strain within the solid state crystal lattice of the solid state material below said outer surface at a pressure so as to induce expansion of solid state crystal lattice, and form a protrusion on the outer surface of the polished face of said solid state material.
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公开(公告)号:US20180158713A1
公开(公告)日:2018-06-07
申请号:US15822568
申请日:2017-11-27
Inventor: SHOGO OKITA , ATSUSHI HARIKAI , NORIYUKI MATSUBARA , AKIHIRO ITOU
IPC: H01L21/683 , H01L21/311 , H01L21/78 , H01L21/304 , H01L23/00
CPC classification number: H01L21/6836 , H01J37/00 , H01L21/304 , H01L21/31138 , H01L21/67069 , H01L21/67109 , H01L21/78 , H01L24/13 , H01L24/95 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834 , H01L2224/95001
Abstract: Provided is a method of manufacturing a semiconductor chip, the method comprising: preparing a plurality of semiconductor chips, each of which has a surface to which a BG tape is stuck, and a rear surface to which a DAF is stuck, and which are held spaced from each other by the BG tape and the DAF, exposing the DAF between semiconductor chips that are adjacent to each other when viewed from the surface side, by stripping the BG tape from the surface of each of the plurality of semiconductor chips, etching the DAF that is exposed between the semiconductor chips that are adjacent to each other, by irradiating the plurality of semiconductor chips held on the DAF, with plasma.
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