公开(公告)号：WO1994008298A2

公开(公告)日：1994-04-14

申请号：PCT/US1993009363

申请日：1993-09-29

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  GALLOWAY, William, C.

IPC: G06F13/12

CPC classification number: G06F13/126

Abstract: A method for improving SCSI controller operations by actively patching SCSI processor instructions. In a first case, tag values assigned to queues for tagged queue operation are a multiple of the SCSI processor jump instruction length. When reselected, the tag value is patched or overwritten as the least significant byte of the address of a jump instruction. The upper bytes point to the beginning of a jump table. Each entry in the jump table is a jump instruction to the sequence for a particular queue or thread. Thus simple entry is made to the desired thread without a conditional branch tree. In a second case, special SCSI operations are directly handled by the host device driver and the SCSI processor only performs conventional data transfers and similar operations. The device driver patches the message length of the SCSI processor code to an illegal value, so that an illegal instruction develops, prompting the host device driver to perform the operation at a register level. This approach allows removal of all special operation conditional branching from the SCSI processor, greatly speeding up operations.

Abstract translation: 通过主动修补SCSI处理器指令来改进SCSI控制器操作的方法。 在第一种情况下，分配给用于标记队列操作的队列的标签值是SCSI处理器跳转指令长度的倍数。 当重新选择时，标签值被修补或重写为跳转指令的地址的最低有效字节。 高字节指向跳转表的开头。 跳转表中的每个条目是针对特定队列或线程的序列的跳转指令。 因此，在没有条件分支树的情况下，对所需的线程进行简单的输入。 在第二种情况下，专用SCSI操作由主机设备驱动程序直接处理，SCSI处理器仅执行常规数据传输和类似操作。 设备驱动程序将SCSI处理器代码的消息长度修补为非法值，从而开发非法指令，提示主机设备驱动程序在注册级执行操作。 这种方法允许从SCSI处理器中删除所有特殊操作条件分支，大大加快了操作。

公开(公告)号：WO1994008296A1

公开(公告)日：1994-04-14

申请号：PCT/US1993009366

申请日：1993-09-29

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  CULLEY, Paul, R. ,  TAYLOR, Mark

IPC: G06F12/02

CPC classification number: G06F13/1673 ,  G06F12/0215 ,  G06F13/4018

Abstract: Double buffering operations to reduce host bus hold times when an expansion bus master is accessing the main memory on a host bus of a computer system. A system data buffer coupled between the main memory and the expansion bus includes 256-bit double read and write buffers. A memory controller coupled to the double read and write buffers and to the expansion bus includes primary and secondary address latches corresponding to the double buffers. The memory controller detects access to the main memory, compares the expansion bus address with the primary and secondary addresses and controls the double read and write buffers and the primary and secondary address latches accordingly. During write operations, data to be written to the same line of memory is written to a first of the double write buffers until a write occurs to an address to a different line before data is transferred to main memory. During read operations, a full line is loaded into a first of the double read buffers, and the next full line is retrieved into a second read buffer from main memory if a subsequent read hit occurs in the first read buffer.

Abstract translation: 双缓存操作，以减少扩展总线主机访问计算机系统的主机总线上的主存储器时的主机总线保持时间。 耦合在主存储器和扩展总线之间的系统数据缓冲器包括256位双重读写缓冲器。 耦合到双读和写缓冲器和扩展总线的存储器控​​制器包括对应于双缓冲器的主地址和副地址锁存器。 存储器控制器检测对主存储器的访问，将扩展总线地址与主地址和辅助地址进行比较，并相应地控制双读和写缓冲器以及主地址和副地址锁存器。 在写入操作期间，要写入同一行存储器的数据被写入双写缓冲器中的第一个，直到在将数据传送到主存储器之前写入到不同行的写入。 在读取操作期间，如果在第一个读取缓冲器中发生后续读取命中，则将全行加载到第一个双重读取缓冲区中，并且将下一个完整行从主存储器检索到第二个读取缓冲区中。

公开(公告)号：WO1994008291A1

公开(公告)日：1994-04-14

申请号：PCT/US1993009365

申请日：1993-09-29

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  LANDRY, John, A.

IPC: G06F15/16

CPC classification number: G06F11/1417 ,  G06F9/4405 ,  G06F11/0724 ,  G06F11/0757 ,  G06F11/22 ,  G06F15/177

Abstract: A multiprocessor computer system includes fault tolerant power up logic for finding a functioning CPU to operate as logical CPU0. Each microprocessor has a physical location designation which remains constant. When the system is powered up, all of the CPUs except the CPU in physical slot 0 (CPU P0) are initially placed in an inactive sleep state. The microprocessor in physical location 0 performs its power on self test (POST), and if the CPU functions properly, the CPU is designated as logical CPU0 (CPU L0). The microprocessor then awakens the remaining CPUs and boots up the rest of the computer system. If CPU P0 is not functioning properly, after a given time period the system awakens the processor in the next physical location and repeats the process of testing the CPU. The process repeats until an operating microprocessor is found to perform the CPU L0 functions.

Abstract translation: 多处理器计算机系统包括用于寻找作为逻辑CPU0操作的功能CPU的容错上电逻辑。 每个微处理器具有保持恒定的物理位置指定。 当系统通电时，物理槽0（CPU P0）以外的CPU中的所有CPU都处于非活动状态。 物理位置0的微处理器执行自检电源（POST），如果CPU正常工作，CPU被指定为逻辑CPU0（CPU L0）。 然后微处理器唤醒剩余的CPU并启动计算机系统的其余部分。 如果CPU P0无法正常工作，在给定的时间段内，系统会在下一个物理位置唤醒处理器，并重复测试CP​​U的过程。 该过程重复，直到发现操作微处理器执行CPU L0功能。

公开(公告)号：WO1994008285A1

公开(公告)日：1994-04-14

申请号：PCT/US1993009351

申请日：1993-09-29

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  GEBARA, Ghassan, R.

IPC: G06F01/10

CPC classification number: H03L7/095 ,  G06F1/06 ,  G06F1/10 ,  H03L7/18 ,  Y10S331/02

Abstract: A method of starting up a system clock that has been generated by a phase-locked loop, and circuitry for accomplishing that method. A low frequency master clock signal is distributed to circuits that generate high frequency local clock signals. These circuits generate the high frequency local clock signals using phase-locked loops in a frequency multiplier configuration. Lock indicator circuitry determines when the phase-locked loop has locked onto the master clock signal and then enables output buffers that then provide the high frequency clock signals to components in the system which need those local clocks.

Abstract translation: 启动由锁相环生成的系统时钟的方法，以及用于实现该方法的电路。 低频主时钟信号被分配到产生高频本地时钟信号的电路。 这些电路使用倍频器配置中的锁相环产生高频本地时钟信号。 锁定指示器电路确定锁相环何时锁定在主时钟信号上，然后启用输出缓冲器，然后将高频时钟信号提供给需要这些本地时钟的系统中的组件。

公开(公告)号：WO1994005503A1

公开(公告)日：1994-03-17

申请号：PCT/US1993007921

申请日：1993-08-19

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  EVERETT, Mickey, H. ,  WALLACE, David, B. ,  HAYES, Donald, J.

IPC: B41J02/14

CPC classification number: B41J2/14209 ,  B41J2/155 ,  B41J2002/14379

Abstract: A length mode drop on demand type ink jet print head includes a lower body portion formed of an active piezoelectric material and an upper body formed from an inactive material. The lower body portion, which includes a plurality of longitudinally extending projections, is poled in a first direction generally orthogonal to both its longitudinal and vertical axes. The upper body portion also includes a plurality of longitudinally extending projections. The lower and upper body portions are mated such that the lower and upper body projections are spaced interdigitally with each other. By mating the lower and upper body portions in this manner, a plurality of ink-carrying channels are formed. The ink jet print head further includes a controller for selectively applying an electric field across each of the lower body projections in the poling direction. When an electric field is applied across one of the lower body projections in this fashion, the projection imparts a pressure pulse to the ink-carrying channel associated therewith. The active lower body portion may be replaced with an inactive lower body portion, an active intermediate body portion which includes a plurality of longitudinally extending projections, each having a strip of conductive material along the top surface thereof, and a layer of conductive material mounting the lower and intermediate body portions together. Here, the intermediate body portion would be poled in its vertical axis and the electric field would be applied between the conductive strip and layer.

Abstract translation: 长度模式下降点阵型喷墨打印头包括由有源压电材料形成的下主体部分和由非活性材料形成的上体。 包括多个纵向延伸的突起的下主体部分沿与其纵向轴线和垂直轴线大致正交的第一方向极化。 上身部分还包括多个纵向延伸的突起。 下身和上身部分配合使得下身和上身突出物彼此间指间隔开。 通过以这种方式配合下部和上部本体部分，形成多个墨水输送通道。 喷墨打印头还包括控制器，用于在极化方向上选择性地在每个下部主体突起上施加电场。 当以这种方式将电场施加在下部主体突起之一上时，突起将压力脉冲施加到与其相关联的载墨通道。 活动的下身部分可以用不活动的下身部分代替，活动的中间体部分包括多个纵向延伸的突出物，每个突起部分沿着其顶表面具有导电材料条，以及一个导电材料层， 下部和中间体部分在一起。 这里，中间体部分将在其垂直轴上极化，并且电场将被施加在导电带和层之间。

公开(公告)号：WO1993019940A1

公开(公告)日：1993-10-14

申请号：PCT/US1993002608

申请日：1993-03-22

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  PIES, John, R. ,  WALLACE, David, B. ,  HAYES, Donald, J.

IPC: B41J02/16

CPC classification number: B41J2/1623 ,  B41J2/14209 ,  B41J2/155 ,  B41J2/1609 ,  B41J2/1618 ,  B41J2/1632

Abstract: An ink jet printhead is comprised of a lower body part (52) having a base section and a plurality of generally parallel spaced projections extending upwardly therefrom and an upper body part (54) having a top section and a corresponding plurality of generally parallel spaced projections extending downwardly therefrom. The top sides of the lower body projections (59) are conductively mounted to the bottom sides of the upper body projections (61) to form sidewalls which define a plurality of ink-carrying channels (70). Strips of a conductive adhesive (57) mount the lower and upper body projections together and a controller (80) is electrically connected to the strips to selectively impart either a positive, zero, or negative voltage to each strip. The lower body part (52) is formed using a piezoelectric material poled in a first direction (P1) generally perpendicular to the channels and the upper body part (54) is formed using a piezoelectric material also poled in the first direction (P2). By applying a positive voltage to a first strip of conductive adhesive and a negative voltage to an adjacent strip of conductive adhesive, first and second electric fields oppositely orientated to each other and normal to the direction of poling are produced in the lower and upper body projections which form first and second sidewalls for the channel, thereby causing the first and second sidewalls to deform in first and second channel expanding directions, respectively.

Abstract translation: 喷墨打印头包括下主体部分（52），下主体部分（52）具有基部和从其向上延伸的多个大致平行间隔开的​​突出部分，以及上主体部分（54），其具有顶部部分和对应的多个大致平行间隔开的​​突出部 从其向下延伸。 下体突起（59）的顶面被导电地安装到上体突起（61）的底侧，以形成限定多个墨水通道（70）的侧壁。 导电粘合剂（57）的条带将下部和上部主体突出物安装在一起，并且控制器（80）电连接到条带以选择性地向每个条带施加正的，零的或负的电压。 下主体部分52使用在大致垂直于通道的第一方向（P1）上极化的压电材料形成，并且使用也沿第一方向（P2）极化的压电材料形成上主体部分（54）。 通过向导电粘合剂的第一条带施加正电压并将负电压施加到相邻的导电粘合带上，在下部和上部主体突起中产生彼此相反定向并垂直于极化方向的第一和第二电场 其形成通道的第一和第二侧壁，从而分别使第一和第二侧壁在第一和第二通道扩张方向上变形。

公开(公告)号：WO1993015456A2

公开(公告)日：1993-08-05

申请号：PCT/US1993000371

申请日：1993-01-20

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  MUNDT, Kevin, W. ,  HESS, Randall, L. ,  POTTER, David, B.

IPC: G06F03/16

CPC classification number: G06F1/3287 ,  G06F1/3203 ,  G06F1/3246 ,  G06F3/0481 ,  G06F3/165 ,  G06F3/167 ,  Y02D10/171

Abstract: A user interface of simplifying selection of speaker volume level and power conservation level in a computer system. An icon is presented for setting the speaker volume which includes a bar graph of relative speaker volume. By depressing left or right arrow keys the graph moves and the volume level of the speaker is changed. By depressing the down arrow key when setting the volume level, the speaker is beeped to allow for a level check during the setting process. A series of icons are used to indicate and select power conservation level. Each icon includes a battery with a faucet attached to the side of the battery. Different water flow rates indicate the various conservation levels. A human figure is located adjacent the faucet to indicate the user-customerized conservation level.

Abstract translation: 用户界面，简化了计算机系统中扬声器音量和功率节省等级的选择。 提供一个用于设置扬声器音量的图标，其中包括相对扬声器音量的条形图。 通过按下左或右箭头键，图形移动，并且扬声器的音量水平发生变化。 通过在设置音量时按住向下箭头键，扬声器将被唤醒，以便在设置过程中进行电平检查。 一系列图标用于指示和选择节能水平。 每个图标包括一个连接在电池一侧的水龙头的电池。 不同的水流量表示各种保护水平。 一个人物位于水龙头附近，以指示用户客户化的保护水平。

公开(公告)号：WO1993012938A1

公开(公告)日：1993-07-08

申请号：PCT/US1992010783

申请日：1992-12-16

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  ADAMS, Gregory, K.

IPC: B41J29/42

CPC classification number: B41J2/471

Abstract: Circuitry for controlling the margin of a laser printer is provided which times a preset margin on a first scanline of a page at high frequency for high accuracy. Thereafter, subsequent scanlines on the page are positioned responsive to the count generated responsive to the preset margin. Hence, the laser may be directly modulated at speeds higher than the standard frequency without a reduction in the relative accuray of the margin.

Abstract translation: 提供了用于控制激光打印机的边缘的电路，其以高频率高于页面的第一扫描线上的预设余量，以获得高精度。 此后，页面上的随后的扫描线响应于响应于预设余量而产生的计数而定位。 因此，可以以比标准频率高的速度直接调制激光，而不会减小边缘的相对精度。

公开(公告)号：WO1993012937A1

公开(公告)日：1993-07-08

申请号：PCT/US1992010952

申请日：1992-12-18

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： COMPAQ COMPUTER CORPORATION ,  HAYES, Donald, J.

IPC: B41J02/16

CPC classification number: B41J2/1634 ,  B23K26/389 ,  B41J2/1609 ,  B41J2/162 ,  Y10T29/49401 ,  Y10T29/49995

Abstract: A method of forming an outwardly tapered orifice (16) for a fully assembled ink jet printhead (10). A main body (12) portion and a cover plate (14) for an ink jet printhead (10) are mounted together such that the cover plate (14) covers an ink-carrying channel (22) which axially extends through the main body portion (12). First and second light beam capable of ablating the material used to form the cover plate (14) is generated and an ink-carrying channel (22) communicating orifice extending through the cover plate (14) and tapering outwardly from a front side of the cover plate (14) to a back side (14a) of the cover plate (14) is formed by directing the first and second light beams at the front side (14b) of the cover plate (14) at first and second angles, respectively, whereby the first and second light beams form the outwardly tapered orifice (16).

公开(公告)号：US20030120775A1

公开(公告)日：2003-06-26

申请号：US10360893

申请日：2003-02-07

Applicant: COMPAQ COMPUTER CORPORATION

Inventor： Justin E. York

IPC: G06F015/173 ,  G06F015/16

CPC classification number: H04L43/00 ,  H04L41/0631 ,  H04L43/0817 ,  H04L51/18 ,  H04L51/24

Abstract: A method and apparatus for sending notifications to a user of a network management system concerning the status of a particular network device such as an SNMP manageable device. The. notification rules are preconfigured and assigned to a corresponding notification action such as an e-mail notification. The user may specify a variety of information to be included in the e-mail notification including the URL address of the network device. Once the notification actions are configured, the communications network is monitored by a management console and the state of each device is compared to the notification rules. When a notification rule is satisfied, the pre-configured e-mail notification is sent to the user. The URL for the device which sent the e-mail notification is placed in the body of the e-mail message so that the user, while reading the e-mail with an HTTP compliant URL-aware mail tool, may click on the URL to access the web-based management system for the device. Then the user can obtain current information concerning the device even though the user may be in a remote location.

Abstract translation: 用于向网络管理系统的用户发送关于诸如SNMP可管理设备的特定网络设备的状态的通知的方法和装置。 的。 通知规则已预配置并分配给相应的通知操作，如电子邮件通知。 用户可以指定要包括在包括网络设备的URL地址的电子邮件通知中的各种信息。 一旦通知操作被配置，通信网络由管理控制台监视，并且每个设备的状态与通知规则进行比较。 当满足通知规则时，将预配置的电子邮件通知发送给用户。 发送电子邮件通知的设备的URL被放置在电子邮件的正文中，以便用户在使用HTTP兼容的URL感知邮件工具读取电子邮件时，可以点击URL 访问设备的基于Web的管理系统。 然后，即使用户可能在远程位置，用户也可以获得关于设备的当前信息。