公开(公告)号：US11831486B2

公开(公告)日：2023-11-28

申请号：US17702707

申请日：2022-03-23

Applicant: Intel Corporation

Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar

IPC: H04L41/046 ,  G06F15/78 ,  H04L41/0896 ,  H04L9/08 ,  G06F30/34 ,  G06F13/42 ,  G06F21/76

CPC classification number: H04L41/046 ,  G06F15/7889 ,  G06F30/34 ,  H04L9/0894 ,  H04L41/0896 ,  G06F13/4221 ,  G06F21/76 ,  H04L2209/122

Abstract: Mechanisms for out-of-band (OOB) management of Field Programmable Gate Array (FPGA) bitstreams and associated methods, apparatus, systems and firmware. Under a first OOB mechanism, a management component, such as a baseband management controller (BMC) is coupled to a processor including an agent in a compute node that includes an FGPA. An FPGA bitstream file is provided to the BMC, and the agent reads the file from the BMC and streams the FPGA bitstream contents in the file to the FPGA to program it. Under second and third OOB mechanisms, a pointer to an FPGA bitstream file that identifies the location of the file that is accessible via a network or fabric is provided to the BMC or other management entity. The BMC/management entity forwards the pointer to BIOS running on the compute node or an agent on the processor. The BIOS or agent then uses the pointer to retrieve the FPGA bitstream file via the network or fabric, as applicable, and streams the FPGA bitstream to the FPGA to program it.

公开(公告)号：US11614979B2

公开(公告)日：2023-03-28

申请号：US15858748

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar

IPC: G06F11/00 ,  G06F21/57 ,  G06F9/445 ,  G06F9/455 ,  H04L29/06 ,  G06F9/50 ,  H04L41/5025 ,  G06F11/34 ,  B25J15/00 ,  G06F1/18 ,  G06F1/20 ,  G06F15/78 ,  H05K7/14 ,  H05K7/18 ,  H05K7/20 ,  H04L67/1008 ,  H04L41/0896 ,  G06N3/063 ,  H04L41/5019 ,  H04L41/14 ,  G06F21/10 ,  G06Q30/0283 ,  G06F9/44 ,  G06F13/40 ,  G06Q10/0631 ,  H04L49/40 ,  G06F9/48 ,  H04L9/40

Abstract: Technologies for managing configuration-free platform firmware include a compute device, which further includes a management controller. The management controller is to receive a system configuration request to access a system configuration parameter of the compute device and access the system configuration parameter in response to a receipt of the system configuration request.

公开(公告)号：US11379214B2

公开(公告)日：2022-07-05

申请号：US16369161

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar ,  Shamanna M. Datta

IPC: G06F9/44 ,  G06F8/656 ,  G06F8/654 ,  G06F3/06 ,  G06F9/4401

Abstract: An interface is provided to update a firmware of a persistent memory module at runtime without restarting an operating system on the platform. The operating system initiates the firmware update by triggering a sleep state or by entering a soft reboot. The interface is capable of preserving the state of the platform for all memory modes that support volatile memory regions, persistent memory regions, or both, and reducing or eliminating the demand for access to memory during the firmware update. The persistent memory module is capable of updating the firmware responsive to a platform instruction generated using the interface, including preserving operational states for memory devices in all memory regions, including memory devices in volatile and persistent memory regions.

公开(公告)号：US11222119B2

公开(公告)日：2022-01-11

申请号：US16392863

申请日：2019-04-24

Applicant: Intel Corporation

Inventor： Sarathy Jayakumar ,  Mohan J. Kumar ,  Ron Story ,  Mahesh Natu

IPC: G06F9/04 ,  G06F21/57 ,  G06F9/455 ,  G06F9/448 ,  G06F9/4401

Abstract: Technologies for secure native code invocation include a computing device having an operating system and a firmware environment. The operating system executes a firmware method in an operating system context using a virtual machine. In response to invoking the firmware method, the operating system invokes a callback to a bridge driver in the operating system context. In response to the callback, the bridge driver invokes a firmware runtime service in the operating system context. The firmware environment executes a native code handler in the operating system context in response to invoking the firmware runtime service. The native code handler may be executed in a de-privileged container. The firmware method may process results data stored in a firmware mailbox by the native code handler, which may include accessing a hardware resource using a firmware operation region.

公开(公告)号：US11068339B2

公开(公告)日：2021-07-20

申请号：US16417555

申请日：2019-05-20

Applicant: Intel Corporation

Inventor： Ashok Raj ,  Ron Gabor ,  Hisham Shafi ,  Sergiu Ghetie ,  Mohan J. Kumar ,  Theodros Yigzaw ,  Sarathy Jayakumar ,  Neeraj S. Upasani

IPC: G06F11/00 ,  G06F11/10 ,  G06F11/07

Abstract: A processor of an aspect includes a decode unit to decode a read from memory instruction. The read from memory instruction is to indicate a source memory operand and a destination storage location. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the read from memory instruction, is to read data from the source memory operand, store an indication of defective data in an architecturally visible storage location, when the data is defective, and complete execution of the read from memory instruction without causing an exceptional condition, when the data is defective. Other processors, methods, systems, and instructions are disclosed.

公开(公告)号：US10958990B2

公开(公告)日：2021-03-23

申请号：US15585936

申请日：2017-05-03

Applicant: Intel Corporation

Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar

IPC: H04L12/24 ,  H04Q9/00

Abstract: Trusted platform telemetry mechanisms and associated methods, apparatus, and firmware components. Trusted telemetry mechanisms are provided for securely collecting platform telemetry data from telemetry data sources on a compute platform, such as machine specific registers (MSRs), device registers, system management bus (SMBus) and memory controllers. The telemetry data is collected from the telemetry data sources using various mechanisms, and securely stored on the compute platform in a manner that is inaccessible to software running on the compute platform. A submission queue and completion queue model may also be implemented to facilitate collection of telemetry data. In addition, a memory-mapped input-output (MMIO) aliasing scheme is provided to facilitate collection of telemetry data from platform telemetry data sources using various access mechanisms.

公开(公告)号：US10929290B2

公开(公告)日：2021-02-23

申请号：US15396562

申请日：2016-12-31

Applicant: Intel Corporation

Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar

IPC: G06F15/177 ,  G06F12/06

Abstract: System, method, and machine readable medium implementing a mechanism for selecting and providing reconfigurable hardware resources in a rack architecture system are described herein. One embodiment of a system includes a plurality of nodes and a configuration manager. Each of the nodes further includes: a plurality of memory resources and a node manager. The node manager is to track the memory resources that are available in the node, determine different possible configurations of memory resources, and generate a performance estimate for each of the possible configurations. The configuration manager is to receive a request to select one or more nodes based on a set of performance requirements, receive from each node the different possible configurations of memory resources and the performance estimate for each of the possible configurations, and iterate through collected configurations and performance estimates to determine one or more node configurations best matching the set of performance requirements.

公开(公告)号：US10592162B2

公开(公告)日：2020-03-17

申请号：US16109606

申请日：2018-08-22

Applicant: Intel Corporation

Inventor： Scott D. Peterson ,  Sujoy Sen ,  Anjaneya R. Chagam Reddy ,  Murugasamy K. Nachimuthu ,  Mohan J. Kumar

IPC: G06F3/06

Abstract: Examples include methods for obtaining one or more location hints applicable to a range of logical block addresses of a received input/output (I/O) request for a storage subsystem coupled with a host system over a non-volatile memory express over fabric (NVMe-oF) interconnect. The following steps are performed for each logical block address in the I/O request. A most specific location hint of the one or more location hints that matches that logical block address is applied to identify a destination in the storage subsystem for the I/O request. When the most specific location hint is a consistent hash hint, the consistent hash hint is processed. The I/O request is forwarded to the destination and a completion status for the I/O request is returned. When a location hint log page has changed, the location hint log page is processed. When any location hint refers to NVMe-oF qualified names not included in the immediately preceding query by the discovery service, the immediately preceding query is processed again.

公开(公告)号：US10521003B2

公开(公告)日：2019-12-31

申请号：US15477857

申请日：2017-04-03

Applicant: Intel Corporation

Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar

IPC: G06F12/08 ,  G06F1/3234 ,  G06F12/0804 ,  G06F12/0802 ,  G06F12/1027 ,  G06F3/06 ,  G06F12/0888

Abstract: A method is described that includes deciding to enter a lower power state, and, shutting down a memory channel in a computer system in response where thereafter other memory channels in the computer system remain active so that computer remains operative while the memory channel is shutdown.

公开(公告)号：US10445154B2

公开(公告)日：2019-10-15

申请号：US15435444

申请日：2017-02-17

Applicant: Intel Corporation

Inventor： Sarathy Jayakumar ,  Mohan J. Kumar ,  Vincent J. Zimmer ,  Rajesh Poornachandran

IPC: G06F9/54

Abstract: This disclosure is directed to firmware-related event notification. A device may comprise an operating system (OS) configured to operate on a platform. During initialization of the device a firmware module in the platform may load at least one globally unique identifier (GUID) into a firmware configuration table. When the platform notifies the OS, the firmware module may load at least one GUID into a platform notification table and may set a platform notification bit in a platform notification table status field. Upon detecting the notification, an OS management module may establish a source of the notification by querying the platform notification table. The platform notification bit may cause the OS management module to compare GUIDs in the platform notification table and the firmware configuration table. Services may be called based on any matching GUIDs. If no GUIDs match, the services may be called based on firmware variables in the device.