公开(公告)号：DE60032049D1

公开(公告)日：2007-01-11

申请号：DE60032049

申请日：2000-04-06

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC

IPC: B42D15/10 ,  G06K7/00 ,  G01S13/74 ,  G06K17/00 ,  G06K19/00 ,  G06K19/07 ,  G08C17/00 ,  H01Q7/00

Abstract: The distance between a smart card and terminal is measured by a circuit that compares the level of rectified (D) voltage in transponder when its receiver circuit (L2,C'2) is set to resonate at the terminal frequency with the rectified voltage when a capacitor (C3) is switched (K1) into the circuit to shift the transponder resonant frequency away from the excitation frequency.

公开(公告)号：DE69835328D1

公开(公告)日：2006-09-07

申请号：DE69835328

申请日：1998-11-20

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC ,  BARDOUILLET MICHEL

IPC: H05B41/28 ,  H02M5/293 ,  H05B41/18 ,  H05B41/392

Abstract: The fluorescent lamp (T) has a bridge rectifier (10) for the incoming low frequency mains supply. The rectifier output (11, 12) is bridged by a switch (M) driven at high frequency to provide a chopped current. Inductors (40, 41) are connected in series in two arms of the bridge and are connected by a switch (36, 37, 38) to form an energy recovery circuit.

公开(公告)号：FR2873243A1

公开(公告)日：2006-01-20

申请号：FR0451511

申请日：2004-07-13

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC

IPC: H02M7/04 ,  H04B1/59

Abstract: L'invention concerne un circuit d'alimentation et un transpondeur comportant un circuit de redressement (13') d'une tension alternative (VE) et deux éléments de stockage d'énergie (C3, C4), le circuit de redressement fournissant une tension redressée à au moins un des éléments de stockage et une tension de sortie (VS) étant fournie par au moins un des éléments de stockage, et au moins un élément de commutation (S1) pour basculer le fonctionnement du circuit entre un état de fourniture d'une tension relativement élevée et un état de fourniture d'une tension relativement faible, le deuxième état configurant le circuit de redressement en fonctionnement mono-alternance.

公开(公告)号：DE60102509T2

公开(公告)日：2005-01-05

申请号：DE60102509

申请日：2001-05-11

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC

IPC: H04B1/59 ,  G06K7/00

Abstract: A terminal for generating an electromagnetic field adapted to communicating with at least one transponder, and a method for controlling such a terminal including: an oscillating circuit adapted to being excited by a remote supply signal of the transponder; a phase demodulator for detecting possible data transmitted by the transponder; circuitry for regulating the signal phase in the terminal's oscillating circuit on a reference value; circuitry for measuring variables linked to the current in the oscillating circuit and to the voltage thereacross; and circuitry for comparing current values of these variables with predetermined values, to determine the presence of a transponder.

公开(公告)号：DE69823470D1

公开(公告)日：2004-06-03

申请号：DE69823470

申请日：1998-12-16

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC

IPC: G07C9/00 ,  E05B49/00

公开(公告)号：FR2846776A1

公开(公告)日：2004-05-07

申请号：FR0213615

申请日：2002-10-30

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART SYLVIE ,  WUIDART LUC

IPC: G11C17/00 ,  G11C11/56 ,  G11C17/14 ,  G11C17/18 ,  H01L27/10 ,  G11C17/08

Abstract: The memory cell (1) comprises at least one, in particular two branches (2,3) connected between two terminals (4,5) where the read voltage (Vr) is applied; each branch comprises two stages connected in series, that is a pre-read stage (6,7) each with two switchable resistors (Rg1,Rg2;Rg3,Rg4) connected in parallel, and a programming stage (8,9) containing a programmable resistor (Rp1,Rp2) of polycrystalline silicon, where the programmable resistors terminals (14,15) are accessible to a proper programming circuit to implement an irreversible decrease of each programmable resistance. The decrease (delta)Rp of the value of the programmable resistance (Rp1,Rp2) is predetermined and chosen to be greater than the difference (delta)Rg between two resistances (Rg1,Rg2;Rg3,Rg4) in the pair of each pre-read stage (6,7). The memory cell also comprises interrupters (K10,K11) for isolating the pre-read stages (6,7) from the programming stages (8,9). The programming stages comprise switches (K14,K15) for aplying the programming voltage (Vp) which is higher than the read voltage (Vr) to the terminals of the programmable resistors (Rp1,Rp2). The reading of the cell state is effected in two successive steps in the course of which the switchable resistors (Rg1,Rg2,Rg3,Rg4) of the pre-read stages are alternatingly selected. Each programmable resistor (Rp1,Rp2) is connected to the lower supply voltage terminal, in particular the ground (5) by a transistor (MN1,MN2) connected as a bistable with the transistor of the other branch. The switchable resistors (Rg1,Rg2;Rg3,Rg4) of the two branches (2,3) are simultaneously controlled so that the values of the selected resistances in each branch are inverted. The irreversible decrease (delta) Rp of the programmable resistances is greater than the difference (E) of the nominal values of the programmable resistances in the non-programmed state. In a variant of the memory cell, the terminal of the programmable resistor is the read terminal which is connectable to the first input of an amplifier whose second input is connected to a reference potential which is chosen at a level intermediate between the voltage levels at the read terminal in the two read phases when the programmable resistance is in the non-programmed state. A method (claimed) for reading the memory cell (claimed) consists in effecting two successive read steps in the course of which the switchable resistances of the pre-read stage are selected.

公开(公告)号：FR2836751A1

公开(公告)日：2003-09-05

申请号：FR0213555

申请日：2002-10-29

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC ,  BARDOUILLET MICHEL ,  MALHERBE ALEXANDRE

IPC: G11C16/22 ,  G11C17/14 ,  G11C17/08 ,  G11C17/18 ,  H01L27/115 ,  H01L21/326

Abstract: A one-time programmable memory cell and the programming thereof including a programming transistor which is disposed in series with a polycrystalline silicon programming resistor forming the memory element. The programming is non-destructive with respect to the polycrystalline silicon resistor.

公开(公告)号：FR2835946A1

公开(公告)日：2003-08-15

申请号：FR0201642

申请日：2002-02-11

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC ,  BARDOUILLET MICHEL

IPC: G06K19/067 ,  G06K19/07 ,  G06K19/077 ,  G11C17/14 ,  H04B1/59 ,  H04B5/02 ,  G06K19/073 ,  G06K7/10 ,  G11C16/02

Abstract: An electromagnetic transponder including: a parallel oscillating circuit adapted to extracting a supply signal from a radiated field; in parallel with the oscillating circuit, several branches each including a programmable resistor and a switch; and a cyclic control element for successively turning on the switches, each resistor forming an element for storing a portion of the code stored in the transponder.

公开(公告)号：FR2835945A1

公开(公告)日：2003-08-15

申请号：FR0201638

申请日：2002-02-11

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC ,  MALHERBE ALEXANDRE ,  BARDOUILLET MICHEL

IPC: G11C17/14 ,  G11C11/41 ,  G11C14/00 ,  H01L21/822 ,  H01L27/04 ,  H03K3/356 ,  H03K5/1532 ,  G06K19/073

公开(公告)号：FR2829645A1

公开(公告)日：2003-03-14

申请号：FR0111678

申请日：2001-09-10

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC ,  BALTHAZAR PIERRE

IPC: H04L9/32 ,  G07F7/10 ,  H04L9/30 ,  G06K19/07

Abstract: Method for delivery of a secret quantity or key (s) to an integrated circuit forming part of an external device or reader used in an authentication process. The secret quantity is a function of a signature of at least one memory (4, 10, 11, 12) associated with an integrated circuit, for verification of the integrity of the memory. A signature comprises a binary word representative of the contents of one or more integrated circuit memories. The invention also relates to a corresponding authentication method and integrated circuit.