METHOD FOR MAKING AN EMISSIVE CATHODE
    101.
    发明申请
    METHOD FOR MAKING AN EMISSIVE CATHODE 审中-公开
    制备阴极阴极的方法

    公开(公告)号:WO2007026086A3

    公开(公告)日:2007-05-31

    申请号:PCT/FR2006050490

    申请日:2006-05-29

    Abstract: The invention concerns a method for producing a triode-type cathode structure including steps for depositing and steps for etching a cathode layer to transform it to cathode conductors; a grid layer to transform it into grid conductors; an electrically insulating layer and the grid conductors until a resistive layer is achieved to provide cavities; cathode conductors to provide them with an open-work structure at the intersection of the cathode conductors and the grid conductors. The invention is characterized in that the steps for etching the grid conductors and the electrically insulating layer consist in: a) depositing a resin layer on the grid layer; b) patterning the resin layer by means of lithography to obtain emissive pads; c) etching the structured grid layer into grid conductors, based on the pattern; d) etching the insulating layer underlying the grid layer by enlarging the etching beyond the emissive pads; e) etching the grid layer at the zones exposed by etching the insulating layer until the resin layer is reached; f) depositing a catalyst layer into the openings of the resin layer so as to form the emissive pads at the base of the cavity; g) removing the resin layer.

    Abstract translation: 本发明涉及一种制造三极型阴极结构的方法,该方法包括以下步骤:沉积和刻蚀阴极层以将其转化为阴极导体的步骤; 一个网格层将其转换为网格导体; 电绝缘层和栅极导体,直到实现电阻层以提供空腔; 阴极导体以在阴极导体和栅极导体的交叉处为它们提供开放式结构。 本发明的特征在于,蚀刻栅格导体和电绝缘层的步骤包括:a)在栅格层上沉积树脂层; b)通过光刻图案化树脂层以获得发射焊盘; c)基于图案将结构化的栅格层蚀刻成栅格导体; d)通过扩大超出发射焊盘的蚀刻来蚀刻栅格层下面的绝缘层; e)在通过蚀刻绝缘层而暴露的区域蚀刻栅格层直到达到树脂层; f)将催化剂层沉积到树脂层的开口中以便在空腔的底部形成发射焊盘; g)除去树脂层。

    ACTIVE-MATRIX FIELD EMISSION DISPLAY
    102.
    发明申请
    ACTIVE-MATRIX FIELD EMISSION DISPLAY 审中-公开
    有源矩阵场发射显示

    公开(公告)号:WO2007055451A1

    公开(公告)日:2007-05-18

    申请号:PCT/KR2006/002511

    申请日:2006-06-28

    Abstract: Provided is a field emission display (FED) in which field emission devices are applied to a flat panel display. The FED includes: a cathode plate including a substrate, first and second thin film transistors (TFTs) that are serially connected on the substrate, a field emitter disposed on a drain electrode of the second TFT, a gate insulating layer having a gate hole surrounding the field emitter, and field emission gate electrodes disposed on the gate insulating layer; and an anode plate including a substrate, and red, green, and blue phosphors disposed on the substrate, wherein the cathode plate and the anode plate are vacuum-packaged parallel and opposite to each other. According to the present invention, uniformity of the FED panel can be significantly improved, and an inherent source-drain leakage current of the TFT can be significantly reduced, so that a contrast ratio of the FED can be significantly enhanced.

    Abstract translation: 提供了一种场致发射显示器(FED),其中场发射装置被应用于平板显示器。 FED包括:包括衬底的阴极板,串联在衬底上的第一和第二薄膜晶体管(TFT),设置在第二TFT的漏电极上的场致发射体,栅极绝缘层,具有围绕 所述场致发射体和设置在所述栅极绝缘层上的场致发射栅电极; 以及包括基板的阳极板和设置在基板上的红色,绿色和蓝色荧光体,其中阴极板和阳极板被彼此平行并相对地真空包装。 根据本发明,可以显着提高FED面板的均匀性,并且能够显着地降低TFT的固有源漏漏电流,从而可以显着提高FED的对比度。

    PROCEDE DE REALISATION DE NANOSTRUCTURES
    103.
    发明申请
    PROCEDE DE REALISATION DE NANOSTRUCTURES 审中-公开
    制造纳米结构的方法

    公开(公告)号:WO2007003826A2

    公开(公告)日:2007-01-11

    申请号:PCT/FR2006/050489

    申请日:2006-05-29

    Abstract: L'invention concerne un procédé de réalisation de nanostructures (104) sur un support, caractérisé en ce qu'il comprend les étapes suivantes : - fourniture d'un support comprenant, sur une de ses faces, une couche de surface (101), - recouvrement de la couche de surface par une couche de catalyseur (102) structurée selon un motif faisant apparaître des zones de la couche de surface couvertes par le catalyseur et des zones de la couche de surface non couvertes par le catalyseur, - gravure de l'épaisseur de la couche de surface (101) dans les zones non couvertes par la couche de catalyseur, - croissance sélective de nanostructures (104) sur les zones de la couche de surface couvertes par le catalyseur. L'invention permet également de réaliser des structures de cathode présentant des nanostructures électriquement indépendantes.

    Abstract translation: 本发明涉及一种在载体上制备纳米结构(104)的方法,其特征在于其包括以下步骤:提供一种在其表面之一上包括表面层(101)的支撑体; 用催化剂层(102)覆盖表面层,所述催化剂层(102)以图案形成,其导致由催化剂覆盖的表面层的区域和未被催化剂层覆盖的表面层的区域是可见的; 蚀刻未被催化剂层覆盖的区域中的表面层(101)的厚度; 在由催化剂覆盖的表面层的区域上选择性地生长纳米结构(104)。 本发明还能够生产具有电独立的纳米结构的阴极结构。

    AN INTERFACE LAMINA
    104.
    发明申请
    AN INTERFACE LAMINA 审中-公开
    接口片

    公开(公告)号:WO02097776A9

    公开(公告)日:2004-05-06

    申请号:PCT/US0216821

    申请日:2002-05-24

    Abstract: An emission layer 3 of an FED device has emitters which are caused to emit electrons or not according to whether or not a voltage on a gate 12, that is to say on a gate line 20 and thus at a gate aperture 121 surrounding the point 13 of the emitter generates an electric field at the point which is sufficiently high for electrons to be emitted from the point. For the voltages of the emitters and the gates of the pixel are controlled. Emitter lines 18 are arranged at the front face 19 of the substrate 4 parallel to one edge of the display and gate lines 20 are arranged at the front face 21 of the emission layer 3, orthogonal to the emitter lines. The front face is covered by an interface lamina 1011 forming part of the emission layer 130. The lamina 101 is a single thickness of fired photo imageable glass.

    Abstract translation: FED装置的发射层3具有根据栅极12上的电压(即,在栅极线20上,并且因此在围绕点13的栅极孔121)处是否发射电子的发射体 在从该点发射电子的足够高的点处产生电场。 对于像素的发射极和栅极的电压进行控制。 发射极线18布置在平行于显示器的一个边缘的基板4的正面19处,并且栅极线20被布置在与发射极线正交的发射层3的正面21处。 前表面由形成发射层130的一部分的界面层1011覆盖。薄片101是烧制的可光成像玻璃的单一厚度。

    DISPLAY DEVICE AND METHOD OF MANUFACTURE THEREOF
    105.
    发明申请
    DISPLAY DEVICE AND METHOD OF MANUFACTURE THEREOF 审中-公开
    显示装置及其制造方法

    公开(公告)号:WO01020639A1

    公开(公告)日:2001-03-22

    申请号:PCT/JP2000/005988

    申请日:2000-09-04

    Abstract: A display device comprises a plurality of electron sources (301) of a laminated structure consisting in a lower electrode, an insulation layer and an upper electrode; a plurality of row electrodes (310) for applying drive voltage to the lower electrodes of electron sources (301) in rows; and a plurality of column electrodes (311) for applying drive voltage to the upper electrodes of the electron sources (301) in columns. At least either the lower or upper electrode of each electron source (301) is connected through a resistor (305) to the row electrode (310) or the column electrode (311).

    Abstract translation: 显示装置包括由下电极,绝缘层和上电极构成的层叠结构的多个电子源(301) 用于向行的电子源(301)的下电极施加驱动电压的多个行电极(310) 以及用于向列中的电子源(301)的上电极施加驱动电压的多个列电极(311)。 每个电子源(301)的下电极或上电极中的至少一个通过电阻器(305)连接到行电极(310)或列电极(311)。

    TIP STRUCTURES, DEVICES ON THEIR BASIS, AND METHODS FOR THEIR PREPARATION
    106.
    发明申请
    TIP STRUCTURES, DEVICES ON THEIR BASIS, AND METHODS FOR THEIR PREPARATION 审中-公开
    提示结构,其基础设备及其制备方法

    公开(公告)号:WO00074107A2

    公开(公告)日:2000-12-07

    申请号:PCT/RU2000/000209

    申请日:2000-05-31

    CPC classification number: G01Q70/16 G01Q70/12 H01J1/3042 H01J2201/319

    Abstract: New designs of electron devices such as scanning probes and field emitters based on tip structure are proposed. The tips are prepared from whiskers that are grown from the vapor phase by the vapo-liquid-solid technology. The tip structure includes a single crystalline substrate and a single crystalline tip. The axes of the tip forms a given angle in respect to the vertical that passes through its basis.

    Abstract translation: 提出了基于尖端结构的电子器件如扫描探针和场发射器的新设计。 尖端由通过蒸气 - 液体 - 固体技术从气相生长的晶须制备。 尖端结构包括单晶衬底和单晶尖端。 尖端的轴线相对于穿过其基础的垂直线形成给定的角度。

    FIELD EMISSION DEVICE, ITS MANUFACTURING METHOD AND DISPLAY DEVICE USING THE SAME
    108.
    发明申请
    FIELD EMISSION DEVICE, ITS MANUFACTURING METHOD AND DISPLAY DEVICE USING THE SAME 审中-公开
    场发射装置,其制造方法和使用该装置的显示装置

    公开(公告)号:WO00054299A1

    公开(公告)日:2000-09-14

    申请号:PCT/JP2000/001377

    申请日:2000-03-08

    CPC classification number: H01J9/025 H01J1/3042 H01J2201/319

    Abstract: A field emission device (FED) comprising an amorphous substrate; impurity diffusion preventing layer; FET formed on a formation surface of a semiconductor layer made of amorphous silicon or polycrystalline silicon; one or more emitters made by etching the semiconductor layer of the FET drain region; and extraction electrode. The semiconductor layer is made by CVD process. The emitter array is formed within a ring or polygonal FET drain region, and surrounded by the ring or polygonal gate electrode and source electrode. The entire FET region is covered with an insulation layer and metal layer. This configuration provides uniform current emission characteristics among emitter chips, and achieves uniform electron emissions to all directions. Application of present FED to a flat panel display device achieves high picture quality, low power consumption, and low manufacturing cost.

    Abstract translation: 一种场发射器件(FED),包括非晶衬底; 杂质扩散防止层; 形成在由非晶硅或多晶硅制成的半导体层的形成表面上的FET; 通过蚀刻FET漏区的半导体层制成的一个或多个发射极; 和提取电极。 半导体层由CVD工艺制成。 发射极阵列形成在环形或多边形FET漏极区域内,被环形或多边形栅极电极和源极包围。 整个FET区域被绝缘层和金属层覆盖。 这种配置在发射极芯片之间提供均匀的电流发射特性,并且实现了向所有方向均匀的电子发射。 将现有FED应用于平板显示装置可实现高画质,低功耗,低制造成本。

    PATTERNED RESISTOR SUITABLE FOR ELECTRON-EMITTING DEVICE, AND ASSOCIATED FABRICATION METHOD
    110.
    发明申请
    PATTERNED RESISTOR SUITABLE FOR ELECTRON-EMITTING DEVICE, AND ASSOCIATED FABRICATION METHOD 审中-公开
    适用于电子发射器件的图形电阻器及相关制造方法

    公开(公告)号:WO99023679A1

    公开(公告)日:1999-05-14

    申请号:PCT/US1998/022717

    申请日:1998-10-27

    Abstract: An electron-emitting device contains a vertical emitter resistor patterned into multiple laterally separated sections (34, 34V, 46, or 46V) situated between the electron-emissive elements (40), on one hand, and emitter electrodes (32), on the other hand. Sections of the resistor are spaced apart along each emitter electrode. The resistor can be formed in a manner self aligned to control electrodes (38 or 52A/58B) of the device or with a separate resistor mask.

    Abstract translation: 电子发射器件包含一个垂直发射电阻器,其被图案化成位于电子发射元件(40)和发射电极(32)之间的多个横向分开的部分(34,34V,46或46V)上, 另一方面。 电阻器的部分沿着每个发射极间隔开。 电阻器可以以自对准的方式形成,以控制器件的电极(38或52A / 58B)或与单独的电阻器掩模。

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