公开(公告)号：EP3097643B1

公开(公告)日：2018-11-21

申请号：EP15740718.0

申请日：2015-01-21

Applicant: Radiant Technologies, Inc.

Inventor： EVANS, Joseph, T.

IPC: H03K21/08 ,  H03K23/76 ,  G11C11/22

CPC classification number: H03K21/08 ,  G11C11/221 ,  H03K23/766

Abstract: A counter that can include a plurality of count stages is disclosed. Each count stage includes a ferroelectric capacitor characterized by first and second polarization states, a variable impedance element, reset and count ports and a detector. The variable impedance element has an impedance between first and second switch terminals that is determined by a signal on a control terminal, the ferroelectric capacitor being connected between the control terminal and the first switch terminal. A reset signal coupled to the control terminal causes the ferroelectric capacitor to be polarized in the first polarization state. The count port is configured to receive pulses to be counted, the count port being connected to the first switch terminal by a conductive load. The detector generates a count complete signal if a potential on the first terminal exceeds a threshold value while the count port is receiving one of the pulses.

公开(公告)号：EP2580757B1

公开(公告)日：2018-08-01

申请号：EP10853021.3

申请日：2010-06-11

Applicant: Radiant Technologies, Inc.

Inventor： EVANS, Joseph, Tate

IPC: G11C11/22 ,  G11C11/24 ,  G11C7/10

CPC classification number: G11C11/22 ,  G11C11/221

Abstract: A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization states, is connected between a control terminal and a first switch terminal. The variable impedance element has an impedance between the first and second switch terminals that is determined by a signal on a control terminal. The conductive load is connected between a first power terminal and the first switch terminal. The second switch terminal is connected to a second power terminal. When a potential difference is applied between the first and second power terminals, a potential on the first switch terminal varies in a manner determined by the state of polarization of the ferroelectric capacitor.

公开(公告)号：EP3198604A1

公开(公告)日：2017-08-02

申请号：EP15843354.0

申请日：2015-09-08

Applicant: Radiant Technologies, Inc.

Inventor： EVANS, JR. Joseph T.

IPC: G11C11/22

CPC classification number: G11C11/221 ,  G11C11/2253 ,  G11C11/2259 ,  G11C11/2273 ,  G11C11/2275 ,  G11C11/5657

Abstract: A memory cell and memories constructed from that memory cell are disclosed. A memory according to the present invention includes a ferroelectric capacitor, a charge source and a read circuit. The charge source receives a data value to be stored in the ferroelectric capacitor. The charge source converts the data value to a remanent charge to be stored in the ferroelectric capacitor and causes that remanent charge to be stored in the ferroelectric capacitor. The read circuit determines a charge stored in the ferroelectric capacitor. The data value has more than three distinct possible states, and the determined charge has more than three determined values. The memory also includes a reset circuit that causes the ferroelectric capacitor to enter a predetermined known reference state of polarization.

Abstract translation: 公开了由该存储单元构成的存储单元和存储器。 根据本发明的存储器包括铁电电容器，电荷源和读取电路。 电荷源接收要存储在铁电电容器中的数据值。 电荷源将数据值转换成剩余电荷以存储在铁电电容器中并使剩余电荷存储在铁电电容器中。 读电路确定存储在铁电电容器中的电荷。 数据值具有多于三种不同的可能状态，并且所确定的电荷具有多于三个确定的值。 存储器还包括使铁电电容器进入预定的已知参考极化状态的复位电路。

公开(公告)号：EP2580757A4

公开(公告)日：2016-10-19

申请号：EP10853021

申请日：2010-06-11

Applicant: RADIANT TECHNOLOGIES INC

Inventor： EVANS JOSEPH TATE

IPC: G11C11/22 ,  G11C7/10 ,  G11C11/24

CPC classification number: G11C11/22 ,  G11C11/221

Abstract: A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization states, is connected between a control terminal and a first switch terminal. The variable impedance element has an impedance between the first and second switch terminals that is determined by a signal on a control terminal. The conductive load is connected between a first power terminal and the first switch terminal. The second switch terminal is connected to a second power terminal. When a potential difference is applied between the first and second power terminals, a potential on the first switch terminal varies in a manner determined by the state of polarization of the ferroelectric capacitor.

Abstract translation: 公开了一种包括铁电电容器，可变阻抗元件和导电负载的存储单元。 特征在于第一和第二极化状态的铁电电容器连接在控制端子和第一开关端子之间。 可变阻抗元件具有由控制端子上的信号确定的第一和第二开关端子之间的阻抗。 导电负载连接在第一电源端子和第一开关端子之间。 第二开关端子连接到第二电源端子。 当在第一和第二电源端子之间施加电位差时，第一开关端子上的电位以由铁电体电容器的极化状态确定的方式变化。

公开(公告)号：EP2580757A1

公开(公告)日：2013-04-17

申请号：EP10853021.3

申请日：2010-06-11

Applicant: Radiant Technologies, Inc.

Inventor： EVANS, Joseph, Tate

IPC: G11C11/22 ,  G11C11/24 ,  G11C7/10

CPC classification number: G11C11/22 ,  G11C11/221

Abstract: A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization states, is connected between a control terminal and a first switch terminal. The variable impedance element has an impedance between the first and second switch terminals that is determined by a signal on a control terminal. The conductive load is connected between a first power terminal and the first switch terminal. The second switch terminal is connected to a second power terminal. When a potential difference is applied between the first and second power terminals, a potential on the first switch terminal varies in a manner determined by the state of polarization of the ferroelectric capacitor.

公开(公告)号：EP2014115A1

公开(公告)日：2009-01-14

申请号：EP07745950.1

申请日：2007-04-12

Applicant: Radiant Technologies, Inc.

Inventor： KIM, Tae Il ,  HA, Tae Joon ,  HWANG, Jeong Yun ,  KIM, Eun Young

IPC: H04Q7/24

CPC classification number: H04W64/00

Abstract: A location based service method and location based service system is provided. The location based service method includes: making requests for position determination of a client terminal according to a first position determination method and a second position determination method, in response to a location based service request; receiving a position determination result according to the first position determination method, and generating first location data including additional information which corresponds to the position determination result according to the first position determination method; providing the client terminal with the first location data; receiving a position determination result according to the second position determination method, and generating second location data, the second location data being refined first location data; and providing the client terminal with the second location data.

公开(公告)号：EP0629312B1

公开(公告)日：1998-04-29

申请号：EP93906973.8

申请日：1993-02-18

Applicant: RADIANT TECHNOLOGIES, INC.

Inventor： EVANS, Joseph, Tate, Jr. ,  BULLINGTON, Jeff, Allen ,  MONTROSS, Carl, Elijah, Jr.

IPC: H01G4/10 ,  H01G7/00 ,  G11C11/22 ,  H01L21/3205 ,  H01L21/768

CPC classification number: H01L28/55 ,  Y10T29/435

Abstract: An improved method for constructing integrated circuit structures in which a buffer SiO2 layer (203) is used to separate various components comprising ferroelectric materials (208) or platinum (202) is disclosed. The invention prevents interactions between the SiO2 buffer layer (203) and the ferroelectric materials (208). The invention also prevents the cracking in the SiO2 which is commonly observed when the SiO2 layer (203) is deposited directly over a platinum region (202) on the surface of the circuit. The present invention utilizes a buffer layer of material which is substantially inert with respect to the ferroelectric material (208) and which is also an electrical insulator to separate the SiO2 layer (203) from the ferroelectric material (208) and/or the platinum regions (202).

公开(公告)号：EP0815596A1

公开(公告)日：1998-01-07

申请号：EP96908703.0

申请日：1996-03-09

Applicant: RADIANT TECHNOLOGIES, INC.

Inventor： EVANS, Joseph, Tate, Jr. ,  WARREN, William, L. ,  TUTTLE, Bruce, A.

IPC: H01L21 ,  H01L27 ,  H01L29

CPC classification number: H01L29/516 ,  G11C11/223

Abstract: An improved ferroelectric FET structure (10) in which the ferroelectric layer (14) is doped to reduce retention loss. A ferroelectric FET according to the present invention includes a semiconductor layer (16) having first and second contacts (18, 19) thereon, the first and second contacts being separated from one another. The ferroelectric FET also includes a bottom electrode (12) and a ferroelectric layer (14) which is sandwiched between the semiconductor layer (16) and the bottom electrode (12). The ferroelectric layer (14) is constructed from a perovskite structure of the chemical composition ABO3 wherein the B site comprises first and second elements and a dopant element that has an oxidation state greater than +4 in sufficient concentration to impede shifts in the resistance measured between the first and second contacts with time. The ferroelectric FET structure preferably comprises Pb in the A-site. The first and second elements are preferably Zr and Ti, respectively. The preferred B-site dopants are Niobium, Tantalum, and Tungsten at concentration between 1 % and 8 %.

公开(公告)号：EP0629312A4

公开(公告)日：1995-04-12

申请号：EP93906973

申请日：1993-02-18

Applicant: RADIANT TECHNOLOGIES INC

Inventor： EVANS JOSEPH TATE JR ,  BULLINGTON JEFF ALLEN ,  MONTROSS CARL ELIJAH JR

IPC: H01L27/04 ,  G11C11/22 ,  H01G4/10 ,  H01G7/00 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108

CPC classification number: H01L28/55 ,  Y10T29/435

Abstract: An improved method for constructing integrated circuit structures in which a buffer SiO2 layer (203) is used to separate various components comprising ferroelectric materials (208) or platinum (202) is disclosed. The invention prevents interactions between the SiO2 buffer layer (203) and the ferroelectric materials (208). The invention also prevents the cracking in the SiO2 which is commonly observed when the SiO2 layer (203) is deposited directly over a platinum region (202) on the surface of the circuit. The present invention utilizes a buffer layer of material which is substantially inert with respect to the ferroelectric material (208) and which is also an electrical insulator to separate the SiO2 layer (203) from the ferroelectric material (208) and/or the platinum regions (202).

Abstract translation: 在哪一个缓冲区的SiO 2层被用于构建集成电路结构的改进的方法来分离各种组分，包括铁电材料或铂是游离缺失盘。 本发明防止在SiO 2缓冲层和铁电材料之间的相互作用。 因此，本发明防止了在所有的SiO 2，其通常观察到当SiO 2层被直接沉积在铂区域中的电路的表面上的裂纹。 因此，本发明利用材料的缓冲层中的所有这是相对于所述铁电材料基本上惰性的是电绝缘体，并从所述铁电体材料和/或铂区域中的SiO 2层分离。

公开(公告)号：EP0528961A4

公开(公告)日：1993-03-31

申请号：EP91910220

申请日：1991-05-06

Applicant: RADIANT TECHNOLOGIES, INC.

Inventor： EVANS, JOSEPH, TATE, JR. ,  BULLINGTON, JEFF, ALLEN

IPC: G02F1/01 ,  G02B6/35 ,  G02F1/29 ,  G02F1/313 ,  G02B5/23

CPC classification number: G02B6/3522 ,  G02B6/355 ,  G02B6/3596 ,  G02F1/0126 ,  G02F1/293 ,  G02F1/3137