公开(公告)号：US09324829B2

公开(公告)日：2016-04-26

申请号：US13850037

申请日：2013-03-25

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser ,  Markus Zundel

IPC: H01L21/336 ,  H01L29/66 ,  H01L23/48 ,  H01L29/423 ,  H01L21/768 ,  H01L29/739 ,  H01L29/78 ,  H01L29/40

CPC classification number: H01L29/66477 ,  H01L21/76898 ,  H01L23/481 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming a trench extending from a first surface of a semiconductor body into the semiconductor body such that a first trench section and at least one second trench section adjoin the first trench section, wherein the first trench section is wider than the second trench section. A first electrode is formed, in the at least one second trench section, and dielectrically insulated from semiconductor regions of the semiconductor body by a first dielectric layer. An inter-electrode dielectric layer is formed, in the at least one second trench section, on the first electrode. A second electrode is formed, in the at least one second trench section on the inter-electrode dielectric layer, and in the first trench section, such that the second electrode at least in the first trench section is dielectrically insulated from the semiconductor body by a second dielectric layer.

Abstract translation: 一种方法包括形成从半导体主体的第一表面延伸到半导体本体中的沟槽，使得第一沟槽部分和与第一沟槽部分相邻的至少一个第二沟槽部分，其中第一沟槽部分比第二沟槽部分宽 。 第一电极在至少一个第二沟槽部分中形成，并且通过第一介电层与半导体本体的半导体区域介电绝缘。 在至少一个第二沟槽部分中，在第一电极上形成电极间电介质层。 第二电极形成在电极间电介质层的至少一个第二沟槽部分中，并且在第一沟槽部分中，使得至少在第一沟槽部分中的第二电极与半导体本体电介质绝缘 第二电介质层。

公开(公告)号：US09218958B2

公开(公告)日：2015-12-22

申请号：US14102107

申请日：2013-12-10

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Markus Zundel ,  Anton Mauder ,  Andreas Meiser ,  Franz Hirler ,  Hans Weber

IPC: H01L21/425 ,  H01L21/02 ,  H01L21/265 ,  H01L21/321

CPC classification number: H01L21/02258 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02299 ,  H01L21/02345 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/32105 ,  H01L29/66325 ,  H01L29/66477

Abstract: A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.

Abstract translation: 一种形成半导体器件的方法包括：通过在半导体衬底和半导体衬底内的外部电极之间产生吸引电场，在半导体衬底的表面上进行半导体衬底的表面区域的阳极氧化以形成氧化物层 以吸引电解质的氧化离子，引起半导体衬底的表面区域的氧化。 此外，该方法包括减少氧化物层内剩余氧化离子的数量，同时半导体衬底在电解质内。

公开(公告)号：US20150333058A1

公开(公告)日：2015-11-19

申请号：US14813738

申请日：2015-07-30

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Markus Zundel ,  Till Schloesser

IPC: H01L27/08 ,  H01L21/768 ,  H01L29/40 ,  H01L49/02

CPC classification number: H01L27/0805 ,  H01L21/7687 ,  H01L21/76877 ,  H01L27/0629 ,  H01L28/40 ,  H01L28/60 ,  H01L28/90 ,  H01L29/407

Abstract: A semiconductor device in a semiconductor substrate includes a trench in a first main surface of the semiconductor substrate. The trench includes a first trench portion extending in a first direction and a second trench portion extending in the first direction. The first trench portion is connected with the second trench portion in a lateral direction. The first trench portion and the second trench portion are arranged one after the other along the first direction. The semiconductor device further includes a trench conductive structure having a conductive material disposed in the first trench portion, and a trench capacitor structure having a capacitor dielectric and a first capacitor electrode disposed in the second trench portion. The first capacitor electrode includes a layer lining a sidewall of the second trench portion.

Abstract translation: 半导体衬底中的半导体器件包括在半导体衬底的第一主表面中的沟槽。 沟槽包括沿第一方向延伸的第一沟槽部分和沿第一方向延伸的第二沟槽部分。 第一沟槽部分沿横向方向与第二沟槽部分连接。 第一沟槽部分和第二沟槽部分沿着第一方向一个接一个布置。 半导体器件还包括具有设置在第一沟槽部分中的导电材料的沟槽导电结构，以及具有电容器电介质的沟槽电容器结构和设置在第二沟槽部分中的第一电容器电极。 第一电容器电极包括衬在第二沟槽部分的侧壁上的层。

公开(公告)号：US20150311294A1

公开(公告)日：2015-10-29

申请号：US14712178

申请日：2015-05-14

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Markus Zundel

IPC: H01L29/40 ,  H01L21/28 ,  H01L29/51 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/7813 ,  H01L21/28008 ,  H01L21/28229 ,  H01L21/743 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/51 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. The first trench has a first width and a first depth, and the second trench has a second width greater than the first width and a second depth greater than the first depth. The method further includes forming, in a common process, an oxide layer in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench, and removing the oxide layer from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.

Abstract translation: 一种制造可控半导体部件的方法包括提供具有顶侧和底侧的半导体本体，以及形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。 第一沟槽具有第一宽度和第一深度，并且第二沟槽具有大于第一宽度的第二宽度和大于第一深度的第二深度。 该方法还包括在公共工艺中形成第一沟槽和第二沟槽中的氧化物层，使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘，并且从第一沟槽中去除氧化物层 沟槽完全或至少部分地使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。

公开(公告)号：US09123801B2

公开(公告)日：2015-09-01

申请号：US14027570

申请日：2013-09-16

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser ,  Thorsten Meyer

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66704 ,  H01L21/28008 ,  H01L21/76 ,  H01L21/761 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/404 ,  H01L29/407 ,  H01L29/66659 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7835

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode.

Abstract translation: 半导体器件包括具有第一主表面的半导体衬底中的晶体管。 晶体管包括源极区域，漏极区域，沟道区域，漂移区域和与沟道区域的至少两侧相邻的栅电极。 沟道区域和漂移区沿着平行于第一主表面的第一方向，在源极区域和漏极区域之间设置。 半导体器件还包括在栅电极下方并与栅电极绝缘的导电层。

公开(公告)号：US09123559B2

公开(公告)日：2015-09-01

申请号：US13906425

申请日：2013-05-31

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Markus Zundel

IPC: H01L21/336 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L21/28 ,  H01L21/762 ,  H01L29/40

CPC classification number: H01L29/0696 ,  H01L21/28008 ,  H01L21/76224 ,  H01L21/76229 ,  H01L29/407 ,  H01L29/42356 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66348 ,  H01L29/66704 ,  H01L29/7813

Abstract: Methods for producing a semiconductor component that includes a transistor having a cell structure with a number of transistor cells monolithically integrated in a semiconductor body and electrically connected in parallel. In an example method, first trenches extending from the top side into the semiconductor body are produced, as are second trenches that each extend from the top side deeper into the semiconductor body than each of the first trenches. A first dielectric abutting on a first portion of the semiconductor body is produced at a surface of each of the first trenches. Also produced is a second dielectric at a surface of each of the second trenches. In each of the first trenches, a gate electrode is produced, after which a second portion of the semiconductor body is electrically insulated from the first portion of the semiconductor body by removing a bottom layer of the semiconductor body.

Abstract translation: 一种用于制造半导体元件的方法，该半导体元件包括晶体管，晶体管具有单个集成在半导体本体中并并联连接的多个晶体管单元的单元结构。 在示例性方法中，产生从顶侧延伸到半导体本体的第一沟槽，以及从第一沟槽中分别从第一沟槽的顶侧延伸到比第一沟槽中的每一个更深的半导体本体。 在每个第一沟槽的表面上产生邻接在半导体本体的第一部分上的第一电介质。 还产生在每个第二沟槽的表面处的第二电介质。 在每个第一沟槽中，制造栅电极，之后半导体本体的第二部分通过去除半导体本体的底层而与半导体本体的第一部分电绝缘。

公开(公告)号：US20150181658A1

公开(公告)日：2015-06-25

申请号：US14138328

申请日：2013-12-23

Applicant: Infineon Technologies AG

Inventor： Andrea Logiudice ,  Andreas Meiser

IPC: H05B33/08 ,  H05B37/03

CPC classification number: H05B37/03 ,  G09G3/006 ,  H01L33/0095 ,  H05B33/0824 ,  H05B33/083 ,  Y10T29/49117 ,  Y10T307/406

Abstract: In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate includes a plurality of driver circuits at the first side of the substrate. Each of the plurality of driver circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further includes at least one load interface at the second side of the substrate. The at least one load interface is configured to couple the current from the plurality of the driver circuits to a plurality of loads at the second side of the substrate.

Abstract translation: 在各种实施例中，提供了一种装置。 该装置包括具有第一侧和与第一侧相对的第二侧的基板。 衬底在衬底的第一侧包括多个驱动电路。 多个驱动电路中的每一个被配置为驱动从衬底的第一侧到衬底的第二侧的电流。 该装置还包括在基板的第二侧的至少一个负载界面。 所述至少一个负载接口被配置为将来自所述多个驱动器电路的电流耦合到所述衬底的第二侧处的多个负载。

公开(公告)号：US20150162192A1

公开(公告)日：2015-06-11

申请号：US14102107

申请日：2013-12-10

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Markus Zundel ,  Anton Mauder ,  Andreas Meiser ,  Franz Hirler ,  Hans Weber

IPC: H01L21/02 ,  H01L21/265

CPC classification number: H01L21/02258 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02299 ,  H01L21/02345 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/32105 ,  H01L29/66325 ,  H01L29/66477

Abstract: A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.

Abstract translation: 一种形成半导体器件的方法包括：通过在半导体衬底和半导体衬底内的外部电极之间产生吸引电场，在半导体衬底的表面上进行半导体衬底的表面区域的阳极氧化以形成氧化物层 以吸引电解质的氧化离子，引起半导体衬底的表面区域的氧化。 此外，该方法包括减少氧化物层内剩余氧化离子的数量，同时半导体衬底在电解质内。

公开(公告)号：US20150076590A1

公开(公告)日：2015-03-19

申请号：US14027570

申请日：2013-09-16

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser ,  Thorsten Meyer

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/66704 ,  H01L21/28008 ,  H01L21/76 ,  H01L21/761 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/404 ,  H01L29/407 ,  H01L29/66659 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7835

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode.

Abstract translation: 半导体器件包括具有第一主表面的半导体衬底中的晶体管。 晶体管包括源极区域，漏极区域，沟道区域，漂移区域和与沟道区域的至少两侧相邻的栅电极。 沟道区域和漂移区沿着平行于第一主表面的第一方向，在源极区域和漏极区域之间设置。 半导体器件还包括在栅电极下方并与栅电极绝缘的导电层。

公开(公告)号：US20150069424A1

公开(公告)日：2015-03-12

申请号：US14020391

申请日：2013-09-06

Applicant: Infineon Technologies AG

Inventor： Joost Willemen ,  Michael Mayerhofer ,  Ulrich Glaser ,  Yiqun Cao ,  Andreas Meiser ,  Magnus-Maria Hell ,  Matthias Stecher ,  Julien Lebon

IPC: H01L31/173 ,  H01L27/02

CPC classification number: H01L31/173 ,  H01L27/0255 ,  H01L27/0629 ,  H01L27/15 ,  H01L29/808 ,  H02H3/20

Abstract: A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. An electrical coupling and an optical coupling between the auxiliary semiconductor device and the semiconductor device are configured to trigger emission of radiation by the auxiliary semiconductor device and to trigger avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device. The semiconductor device includes a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer.

Abstract translation: 半导体部件包括被配置为发射辐射的辅助半导体器件。 半导体部件还包括半导体器件。 辅助半导体器件和半导体器件之间的电耦合和光耦合被配置为触发辅助半导体器件的辐射发射，并通过吸收半导体器件中的辐射来触发半导体器件中的雪崩击穿。 半导体器件包括埋在半导体主体的表面下方的第一导电类型的第一层和布置在表面和第一层之间的第二导电类型的掺杂半导体区域之间的pn结。