公开(公告)号：DE69512722D1

公开(公告)日：1999-11-18

申请号：DE69512722

申请日：1995-08-02

Applicant: PIXTECH SA

Inventor： CLERC JEAN-FREDERIC

IPC: H01J9/02 ,  H01J1/304 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30

Abstract: The cathode (1) includes an insulating substrate (10) and a resistive layer (11) which supports an array of micro-tips (2). Cathode conductors (13) are placed on top of the resistive layer over a thin conductor coat (19). The conductors are organised in columns (15) each column encompassing a large number of micro-tips. The micro-tips are located in the centre of circular openings (17) present along the cathode conductors. Each micro-tip is thus separated from the conductor by a circular area of same resistivity. A control grid (3) is associated with the cathode and separated from the conductors by two insulating layers (16,18).

公开(公告)号：FR2766964B1

公开(公告)日：1999-10-29

申请号：FR9709917

申请日：1997-07-29

Applicant: PIXTECH SA

Inventor： MOUGIN STEPHANE ,  CHASSAGNE PASCAL

IPC: H01J9/24 ,  H01J5/02 ,  H01J5/24 ,  H01J9/26 ,  H01J29/86 ,  H01J29/94 ,  H01J31/12 ,  H01J9/40 ,  H01J9/38

Abstract: The vacuum assembly method in an oven assembles two parallel screens (1,4) in an internal space (6). The peripheral sealing is effected in two steps. In the first step, a first sealing joint (5) is sealed, maintaining open a second hole (13) of communication with the internal space. In a second step, a closure element (16) seals a second sealing unit (15) sealed at a second temperature lower than the first sealing temperature.

公开(公告)号：FR2761522B1

公开(公告)日：1999-06-04

申请号：FR9704097

申请日：1997-03-28

Applicant: PIXTECH SA

Inventor： JAGER AXEL ,  TORRENT CHRISTIAN

IPC: H01J29/04 ,  G09F9/30 ,  H01J1/304 ,  H01J31/12 ,  H01J1/30 ,  H01J1/90

Abstract: The cathode structure of a flat display screen includes a substrate on which there are columns (15) of individually polarisable cathode conductors. These are associated with a resistive layer (11) on which electronic emission micropoints (2) are deposited. There is also provision to annul the effective lateral electric field between two neighbouring columns which are held at different potentials. Between two neighbouring columns there is an inter-column conductive track which is intended to be polarised to a potential at least equal to the minimal polarisation potential of the cathode conductors. These inter-column conductive tracks may be connected together by one of their ends. The structure may also comprise an insulating layer carried on the cathode conductors associated with the resistive layer. A grid conductor layer is then deposited on the insulating layer.

公开(公告)号：FR2761196A1

公开(公告)日：1998-09-25

申请号：FR9703639

申请日：1997-03-20

Applicant: PIXTECH SA

Inventor： HAMON OLIVIER ,  PEPI RICHARD

IPC: H01J9/40 ,  H01J29/94 ,  H01J9/39

Abstract: The pump tube construction produces a vacuum in the area (6) between two parallel plates (1,4) which correspond to a flat screen display. The pump tube (16) is made of ductile metal, which can be closed off by squeezing at the end distant to the flat screen display connection.

公开(公告)号：FR2748348B1

公开(公告)日：1998-07-24

申请号：FR9605934

申请日：1996-05-06

Applicant: PIXTECH SA

Inventor： GRAND CLEMENT JEAN LUC ,  BANCAL BERNARD

IPC: G09G3/20 ,  G09G3/22 ,  H01J31/12 ,  H01J29/02 ,  G09F9/30

Abstract: The screen has a cathode (2) formed of microdots arranged in columns (K1-K3) under an insulating coating which carries the pixel selection grid divided into rows (L1-L3). The colour selection grid has groups of slits (e.g. A1R,A1G,A1B) extending in the direction of the columns, each group covering the width of one column. Slits of the same rank in each group are connected to a common terminal. The anode is similarly divided into groups of parallel strips of luminophors of the primary colours, each strip corresponding to one slit, and all strips being returned to the same voltage.

公开(公告)号：FR2748347B1

公开(公告)日：1998-07-24

申请号：FR9605931

申请日：1996-05-06

Applicant: PIXTECH SA

Inventor： MOUGIN STEPHANE ,  COURREGES FRANCIS ,  BANCAL BERNARD ,  RIVIERE CAZAUX LIONEL

IPC: H01J31/12 ,  G09F9/30 ,  H01J29/08 ,  H01J29/28

公开(公告)号：FR2748346B1

公开(公告)日：1998-07-24

申请号：FR9605930

申请日：1996-05-06

Applicant: PIXTECH SA

Inventor： MOUGIN STEPHANE ,  REYNAUD GUY ,  OULES CHATON CATHERINE

IPC: H01J31/12 ,  G09F9/30 ,  H01J29/08 ,  H01J29/28

Abstract: The screen has a cathode composed of microdots (2) for electron bombardment of an anode (5) provided with luminophores (7) of the primary colours on strips (9) of indium-tin oxide deposited on the glass (6). The strips are separated by insulation (20) whose surface (21) has a secondary emission coefficient less than 1 at least within the range of primary electron energies. Each insulating strip of e.g. silicon dioxide has sufficient resistivity to prevent breakdown between two neighbouring luminophores. Its surface may have a coating of low-emission material (e.g. silicon) to a thickness of about 100 Angstrom with a gap of 5-10 mu m at each edge.

公开(公告)号：FR2756418A1

公开(公告)日：1998-05-29

申请号：FR9614616

申请日：1996-11-22

Applicant: PIXTECH SA

Inventor： JAGER AXEL

IPC: H01J29/04 ,  G09F9/30 ,  G09G3/22 ,  H01J3/02 ,  H01J29/32 ,  H01J29/74 ,  H01J31/12 ,  H04N5/68 ,  H01J29/72

公开(公告)号：FR2749431A1

公开(公告)日：1997-12-05

申请号：FR9606945

申请日：1996-05-31

Applicant: PIXTECH SA

Inventor： BANCAL BERNARD ,  DARBOIS FRANCOIS ,  PEYRE JEAN FRANCOIS

IPC: G09G3/20 ,  G09G3/22 ,  G09G5/10 ,  G09G1/26

Abstract: The brightness control is achieved by modifying the width of an addressing signal (Hsync) applied to the rows of a first group of pixels. The rows of a second group of pixels are addressed by amplitude modulation, at the row scan frequency, of a polarisation potential (Ki) as a function of the brightness required at a pixel. The addressing signal is timed to correspond to the synchronisation signal. The width of the synchronisation pulse is controlled by counting clock pulses delivered at a frequency much higher than that of the synchronisation signal. The clock signal corresponds to the clock converting incoming brightness values arriving serially to a parallel form.

公开(公告)号：FR2735265B1

公开(公告)日：1997-08-22

申请号：FR9507016

申请日：1995-06-08

Applicant: PIXTECH SA

Inventor： BANCAL BERNARD

IPC: H01J31/12 ,  G09G3/22 ,  G09G3/20

Abstract: The screen has an anode with luminophores on at least two sets of conductive strips which are bombarded with electrons from microprints of the cathode. Each set in turn is switched by the control circuit to a voltage below the minimum value of the cathode bias. The circuit incorporates two complementary MOSFETs (MP,MN) with gate electrodes addressed by control signals (CP,CN) via series resistors (R3,R4) and capacitors (C1,C2). The source of the n-channel MOSFET is returned to a negative voltage (VAl) below the minimum potential of the cathode microprints. This maximum amplitude of negative pulses is fixed by the value of an additional Zener diode (DZ2).