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公开(公告)号：KR1020100109223A
公开(公告)日：2010-10-08
申请号：KR1020090027718
申请日：2009-03-31
Applicant: 삼성전자주식회사
CPC classification number: G11C7/1006 , G06F11/1048 , G11C16/3404 , G11C2029/0411 , G11C16/14 , G11C16/06 , G11C16/08 , G11C16/16
Abstract: PURPOSE: A nonvolatile memory device, a memory system including the same, and an operating method thereof are provided to perform an erase decoding according to the number of erase bits when a decoded bit error rate is minimum. CONSTITUTION: A memory cell array(210) is connected to an address decoder(220) through word lines. The memory cell array is connected to a read and write circuit(230) through bit lines. The address decoder operates in response to the control of a control logic(250). The read and write circuit is connected to the memory cell array through bit lines. A storage circuit(240) is connected to the read and write circuit through data lines.
Abstract translation: 目的：提供一种非易失性存储装置，包括该存储装置的存储器系统及其操作方法，以便在解码误码率最小时根据擦除位数执行擦除解码。 构成：存储单元阵列（210）通过字线连接到地址解码器（220）。 存储单元阵列通过位线连接到读和写电路（230）。 地址解码器响应于控制逻辑（250）的控制而工作。 读写电路通过位线连接到存储单元阵列。 存储电路（240）通过数据线连接到读和写电路。
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公开(公告)号：KR1020100080691A
公开(公告)日：2010-07-12
申请号：KR1020090000099
申请日：2009-01-02
Applicant: 삼성전자주식회사
CPC classification number: G06F11/1008 , H03M13/1105 , H03M13/1108
Abstract: 1-비트의에러를정정하기위한방법및 장치가개시된다. 본발명의실시예에따른 1-비트용에러정정방법은, 각변수노드에연결된체크노드중 패리티조건을만족시키지않는체크노드의개수에기초하여에러가발생한변수노드를추정할수 있고, 추정된변수노드에상응하는비트의에러를용이하게정정할수 있다.
Abstract translation: 目的：提供1位纠错的装置和方法，通过使用小计算来校正1位错误。 构成：计算单元计算不满足连接到每个变量节点的奇偶校验条件的校验节点的编号（S610）。 控制器将预定值与校验节点的最大数量进行比较（S620）。 纠错单元对与变量节点相对应的位进行解码（S630）。 控制器提取不满足奇偶校验条件的校验节点和存在于初始或最后部分的变量节点的节点索引（S640）。 误差校正单元从计算出的变量节点解码与第k个之前或之后的索引的可变节点相对应的比特（S650）。
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公开(公告)号：KR1020100033195A
公开(公告)日：2010-03-29
申请号：KR1020080092254
申请日：2008-09-19
Applicant: 삼성전자주식회사
CPC classification number: H03M13/373 , G06F11/1068 , H03M13/13 , H03M13/455 , G11C16/26
Abstract: PURPOSE: A non-volatile memory system and a data processing method thereof are provided to remarkably enhance reliability of read data by providing an improved error correction capability. CONSTITUTION: A logic '0' is injected to an erasure coordinate of read data received by using the location of a recognized erasure(S110). A read data is outputted to a codeword through an error correction decoding(S120). A logic '1' is injected to a read data received by using the location of a recognized erasure(S130). An error correction computation for read data is executed. A read data is outputted to a codeword through the error correction computation(S140). One which has the shortest hamming distance with an originally received read data is determined as a final decoding output among decoded codewords(S150).
Abstract translation: 目的：提供非易失性存储器系统及其数据处理方法，通过提供改进的纠错能力来显着提高读取数据的可靠性。 构成：通过使用识别的擦除的位置将接收的读取数据的擦除坐标注入逻辑“0”（S110）。 通过纠错解码将读取的数据输出到码字（S120）。 通过使用识别的擦除的位置将接收的读取数据注入逻辑“1”（S130）。 执行读取数据的纠错计算。 通过纠错计算将读取的数据输出到码字（S140）。 确定具有最初接收到的读取数据的最短汉明距离的一个作为解码码字中的最终解码输出（S150）。
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公开(公告)号：KR1020100010664A
公开(公告)日：2010-02-02
申请号：KR1020080071647
申请日：2008-07-23
Applicant: 삼성전자주식회사
CPC classification number: G11C11/5628 , G11C7/1006
Abstract: PURPOSE: A memory device and a memory data programming method are provided to store data without creating errors by varying the threshold voltage of a memory cell. CONSTITUTION: A memory cell array(110) comprises a plurality of multi-bit cells. An encoder(130) generates at least one first codeword with a first maximum value based on successive 1 values after encoding a first data page. An encoder generates at least one first codeword with a second maximum value based on successive 0 values after encoding a first data page. An encoder generates at least one second codeword after encoding a second data page. A programming part(120) programs at least one first codeword and a second codeword in a plurality of multi-bit cells.
Abstract translation: 目的：提供存储器件和存储器数据编程方法以通过改变存储器单元的阈值电压来存储数据而不产生错误。 构成：存储单元阵列（110）包括多个多位单元。 编码器（130）在编码第一数据页之后基于连续的1值产生具有第一最大值的至少一个第一码字。 编码器在编码第一数据页之后，基于连续的0值，生成具有第二最大值的至少一个第一码字。 编码器在编码第二数据页面之后生成至少一个第二码字。 编程部分（120）对多个多比特单元中的至少一个第一码字和第二码字进行编程。
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公开(公告)号：KR1020090099756A
公开(公告)日：2009-09-23
申请号：KR1020080024929
申请日：2008-03-18
Applicant: 삼성전자주식회사
IPC: G11C29/42
CPC classification number: H03M13/03 , G06F11/1072 , H03M13/05
Abstract: PURPOSE: A memory device and an encoding/decoding method are provided to reduce an error ratio of a critical data page. CONSTITUTION: A memory device includes a memory cell array and a decoder(210,220,230). The decoder estimates a first message by ECC(Error Control Codes) decoding a first codeword generated from the first data read from a memory cell array. The decoder generates a second codeword by coupling the second data read from the memory cell array and the estimated first message. The decoder ECC(Error Control Codes) decodes the second code word and estimates the second message.
Abstract translation: 目的：提供存储器件和编码/解码方法，以减少关键数据页的错误率。 构成：存储器件包括存储单元阵列和解码器（210,220,230）。 解码器通过对从存储单元阵列读取的第一数据生成的第一码字进行ECC（错误控制码）的解码来估计第一消息。 解码器通过耦合从存储器单元阵列读取的第二数据和估计的第一消息来产生第二码字。 解码器ECC（错误控制代码）解码第二码字并估计第二个消息。
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Patent Agency Ranking
公开(公告)号：KR1020090099265A
公开(公告)日：2009-09-22
申请号：KR1020080024415
申请日：2008-03-17
Applicant: 삼성전자주식회사
IPC: G11C7/10
CPC classification number: G06N99/005
Abstract: A memory device and a data determining method are provided to reduce error rate of data page by applying a new error control codes decoding method. A memory device(100) comprises a memory cell array(110), a determining unit(120) and a decoder(130). The memory cell array comprises a memory page(111). The memory page comprises a plurality of memory cells. The determining unit reads data from the memory cells of the memory page. The memory device reads data from the memory cells inside the memory page by assigning a specific voltage in a word line connected to the memory page. The decoder decodes the first data with error control code. The decoder decodes the second data with error control code.
Abstract translation: 提供存储装置和数据确定方法，以通过应用新的错误控制代码解码方法来减少数据页的错误率。 存储装置（100）包括存储单元阵列（110），确定单元（120）和解码器（130）。 存储单元阵列包括存储器页（111）。 存储器页面包括多个存储器单元。 确定单元从存储器页的存储单元读取数据。 存储器件通过在连接到存储器页的字线中分配一个特定的电压来从存储器页内的存储器单元中读取数据。 解码器用错误控制码解码第一个数据。 解码器用错误控制码译码第二个数据。
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公开(公告)号：KR1020090054901A
公开(公告)日：2009-06-01
申请号：KR1020080115331
申请日：2008-11-19
Applicant: 삼성전자주식회사
IPC: H04Q9/04
Abstract: A method and an apparatus for setting up and actuating a contraction function of a remote controller are provided to enable a user to user the functions, which are used frequently, by setting up the functions with abbreviation keys of a remote controller. A remote controller receiver(210) receives a key signal from a remote controller, and a modem unit(230) transmits and receives the data of a website that a user wants through web browsing. A signal processor(270) converts webpage data and contents data into a video signal, and a display unit(280) displays the video signal that is outputted. A controller(260) maps a received specific key to an apparatus control executing software on a website. The controller executes the mapped apparatus control executing software.
Abstract translation: 提供了一种用于设置和启动遥控器的收缩功能的方法和装置，以使用户能够通过利用遥控器的缩写键设置功能来使用户频繁使用的功能。 遥控器接收器（210）从遥控器接收钥匙信号，并且调制解调器单元（230）通过网页浏览发送和接收用户想要的网站的数据。 信号处理器（270）将网页数据和内容数据转换为视频信号，显示单元（280）显示输出的视频信号。 控制器（260）将接收到的特定密钥映射到网站上的设备控制执行软件。 控制器执行映射设备控制执行软件。
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128.发明授权
公开(公告)号：KR100855587B1
公开(公告)日：2008-09-01
申请号：KR1020070005158
申请日：2007-01-17
Applicant: 삼성전자주식회사
IPC: G06F13/16 , G06F12/00 , G06F15/167 , G06F15/16
Abstract: 본 발명은 메일박스 영역을 가지는 멀티패스 액세스블 반도체 메모리 장치 및 그에 따른 메일박스 액세스 제어방법에 관한 것으로, 본 발명에 일예에 따른 반도체 메모리 장치는, 독립적으로 설치된 복수의 포트들과 동작적으로 연결되며, 상기 포트들 중 권한이 부여된 하나의 포트와의 사이에 형성된 데이터 액세스 패스를 통하여 선택적으로 액세스되며, 메모리 셀 어레이 내에 적어도 하나 이상 할당된 공유메모리 영역과; 상기 포트들간의 메시지 통신을 제공하기 위해 각 포트별로 독립적으로 구비되며, 상기 데이터 액세스 패스를 형성하는 데이터 입출력 라인을 공유하여 상기 공유메모리 영역의 특정 어드레스에 대응하여 액세스되는 메일박스 영역들을 구비한다. 본 발명에 따르면, 메일박스의 효율적인 배치 및 효율적인 메시지 액세스 패스 구현이 가능해진다.
포트, 메일박스, one dram, 액세스 패스, 공유메모리 영역-
公开(公告)号：KR100765797B1
公开(公告)日：2007-10-15
申请号：KR1020060106702
申请日：2006-10-31
Applicant: 삼성전자주식회사
IPC: H04N21/4363
CPC classification number: H04N21/43635 , G09G2370/06
Abstract: A source apparatus and a method for controlling the same by using CEC(Consumer Electronics Control) of an HDMI(High-Definition Multimedia Interface) are provided to receive a command of performing an operation related to a message by using the CEC, thereby enabling another operation related to the received message. A message related to a predetermined event is transmitted to a sync device by using a CEC protocol if the event is generated(910). A command for the execution of an operation related to the message is received from the sync device by using the CEC protocol(920). The operation related to the message is carried out based on the received command(930). The command is defined by using a vendor command format of the CEC protocol. The operation is executed based on the response previously stored in the sync device. The operation is performed based on the analysis of the response.
Abstract translation: 提供了通过使用HDMI（高清晰度多媒体接口）的CEC（消费者电子控制）来控制源的设备和方法，以通过使用CEC来接收执行与消息有关的操作的命令，从而使得另一个 操作与收到的消息有关。 如果生成事件，则通过使用CEC协议将与预定事件相关的消息发送到同步设备（910）。 通过使用CEC协议（920）从同步装置接收用于执行与消息相关的操作的命令。 基于接收到的命令（930）执行与消息相关的操作。 该命令通过使用CEC协议的供应商命令格式来定义。 该操作基于先前存储在同步设备中的响应来执行。 基于对响应的分析来执行操作。
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公开(公告)号：KR100739774B1
公开(公告)日：2007-07-13
申请号：KR1020050121899
申请日：2005-12-12
Applicant: 삼성전자주식회사
IPC: H04N5/45
CPC classification number: H04N5/45 , G06F3/0481 , G06F2203/04804 , G09G2340/10 , G09G2340/125 , H04N21/4143 , H04N21/42204 , H04N21/4316 , H04N21/4318 , H04N21/4858
Abstract: 포인팅 디바이스의 위치에 따라 PIP 영역을 자동으로 반투명/불투명하게 변환할 수 있도록 하는 디스플레이 장치 및 방법, 정보 처리 장치 및 방법이 개시된다. 본 발명에 따른 픽쳐인픽쳐(Picture In Picture:PIP) 기능을 제공하는 정보 처리 장치는, PIP 영역의 위치 정보를 디스플레이 장치로부터 수신하고, 포인팅 장치가 상기 PIP 영역에 위치하는지 여부에 따라 상기 PIP 영역의 화면을 반투명/불투명으로 전환시키도록 하는 트랜스패런시 정보를 상기 디스플레이 장치로 전송하는 통신부와, 상기 포인팅 장치가 상기 PIP 영역에 위치하는지 여부에 따라 상기 트랜스패런시 정보의 상태를 설정하는 PIP 모니터링부를 포함한다.
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