Abstract:
An analog electronic component, includes input and output pins, analog devices and non-volatile fuses. The analog devices are operative to perform analog signal processing on signals received via at least one input pin and to output processed signals on at least one output pin. The analog devices include adjustable elements. The non-volatile fuses are coupled to the adjustable processing elements and are electrically programmable via at least some of the input pins. Programming the non-volatile fuses adjusts the adjustable elements to alter characteristics of the analog signal processing.
Abstract:
Input offset voltage calibration of an analog device, or plurality of analog devices, is controlled by a microcontroller. The microcontroller and analog device(s) are fabricated on an integrated circuit die or in multi-chip package. The microcontroller applies a digital word to an input offset voltage compensation circuit of the analog device for generating input offset voltage compensation circuit of the analog device for generating input offset voltage compensation. The analog device is switched to a calibrate mode and a voltage comparator compares the output of the analog input device and a voltage reference. When the output of the analog input device is equal to or greater than the voltage reference, the comparator output signals the microcontroller by changing its output logic level. The input offset voltage compensation circuit of the analog input device has a storage register or memory that retains the digital word which compensates for the input device has a storage register or memory that retains the digital word which compensates for the input offset voltage.
Abstract:
A device, system and method for providing access to user memory in emulator systems. The emulator system contains an emulator system memory, a user system memory and an emulator device. The emulator device operates in a mode where program execution instructions originate in the emulation memory while read and write instructions target the user memory. Logic included in the emulator chip directs the read and write memory accesses to the user memory while instructions are fetched from the emulator memory.
Abstract:
A capacitive sensor system has a receiving electrode with a capacitive coupling to a ground plane or ground electrode, a first transmission electrode arranged between the receiving electrode and the ground plane and having a size with respect to the receiving electrode such that the transmission electrodes covers a surface area of the receiving electrode, and a second transmission electrode arranged adjacent to the receiving electrode and which is not coupled with the first transmission electrode, wherein the second transmission electrode is driven with a higher alternating voltage than the first transmission electrode.
Abstract:
To establish an initial/resting position of a permanent magnet rotor, all motor stator windings are stimulated (voltage applied thereto) in sequence, the time it takes for current in the stimulated stator winding to rise to a specific current value is measured for each stator winding and these time measurement results processed. From the measured time results rotor position to within 60 degrees is determined and the position sector is known prior to starting/rotating the motor. Once the rotor position is known, the next commutation point in a six step sequence is known before actually starting/rotating the motor. Position measurement winding stimulation may be interleaved with commutation pulses, or the unexcited stator winding may be stimulated between commutation pulses to the other two excited stator, wherein one of the two stator windings remains connected to the power and provides a current return path to the unexcited but stimulated stator winding.
Abstract:
Efficiency of a switch mode power supply (SMPS) is optimized by operating the SMPS in an asynchronous mode when current being supplied therefrom is less than a certain current value and operating the SMPS in a synchronous mode when the current being supplied therefrom is equal to or greater than the certain current value. When the SMPS is operating in the synchronous mode high-side and low-side power transistors alternately turn on and off. When the SMPS is operating in the asynchronous mode only the high-side power transistor turns on and off and the low-side power transistor remains off. When charging a battery with the SMPS discharge of the battery is eliminated when operating in the asynchronous mode at a low current output.
Abstract:
Power supply modules have outputs coupled in parallel and convey load share balancing information over a single wire load share bus. Pulse width modulation (PWM) signals represent output loading of each of the power supply modules over the single wire load share bus. The PWM load share signal width (time asserted) of the PWM signal represents the output loading of the respective power supply module. Each of the power supply modules detect the assertion of the PWM signal on the load share bus and then each of them simultaneously drive the load share bus with a PWM signal representing their respective output loading. The power supply module having the greatest percent loading will assert its PWM load share signal longest, and the other power supply modules will thereafter adjust their outputs to more evenly supply power outputs to the load.
Abstract:
Power consumption of a device having a resistive touch screen may be reduced if the resistive touch screen is not scanned unless a touch thereto is imminent, especially if the device can remain in a low power sleep mode during no-touch inactivity. Furthermore, detecting a potential touch earlier then an actual first touch may improve initial touch response time. The resistive touch screen may comprise top and bottom Indium Tin Oxide (ITO) coated planes. The top ITO coated plane may be used as a capacitive proximity detector and the bottom ITO coated plane may be used as a guard shield for the top ITO coated plane to significantly reduce parasitic capacitance thereof and enhance the sensitivity of capacitive proximity detection. The device may also remain in a low power sleep mode until a potential touch is detected thereby further saving device power consumption.
Abstract:
Extending pulse width modulation phase offset when generating phase shifted groups of pulse width modulation (PWM) signals is accomplished with a separate phase counter that is independent of the time-base counters used in traditional PWM generation circuits and that is prevented from being re triggered until an existing duty cycle has completed. This is accomplished with a phase offset counter, a phase comparator and a circuit that is triggered via a master time base for overall synchronization of the multi-phase PWM signal generation.
Abstract:
A voltage regulator has a regulated output voltage that is maintained up to a current limit, Ilimit, then as the load continues to decrease in resistance (impedance) the current does not increase past the current limit, Ilimit, but rather the output voltage decreases forcing the output current to also decrease to satisfy Ohm's Law: lout = Vout/ZLoad- When the output voltage starts dropping below the regulated voltage value because of current limiting the voltage regulator shifts from a current limit mode to a current foldback mode wherein the output current decreases with the decrease in output voltage until the output current reaches a current foldback minimum, Ifoldback, at an output voltage of substantially zero volts. As the load resistance (impedance) begins to increase so will the output voltage and thus output current until the output voltage is back at substantially the regulation voltage value, and the output current is less than or equal to the current limit, Ilimit.