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    PRECISE RELAXATION OSCILLATOR INTEGRATED CIRCUIT HAVING TEMPERATURE COMPENSATING FUNCTION
    1.
    发明专利
    PRECISE RELAXATION OSCILLATOR INTEGRATED CIRCUIT HAVING TEMPERATURE COMPENSATING FUNCTION 失效

    公开(公告)号：JPH11298299A

    公开(公告)日：1999-10-29

    申请号：JP35977998

    申请日：1998-12-17

    Applicant: MICROCHIP TECH INC

    Inventor： NOLAN JAMES B ,  DARMAWASKITA HARTONO

    IPC: H03B5/04 ,  H03B5/20 ,  H03K3/011 ,  H03K3/0231 ,  H03L1/02

    Abstract: PROBLEM TO BE SOLVED: To provide a buffer oscillator with which a stable clock frequency can be maintained independently of a temperature. SOLUTION: A precise relaxation oscillator 1 having temperature compensation generates the stable clock frequency over the wide fluctuation of a surrounding temperature. This oscillator has a vibration generator 100 and two independent current generators 200. The outputs of two programmable independent current generators are coupled for supplying a capacitor charging current independent of the temperature. The precise relaxation oscillator 1 having the temperature compensation is provided on a single monolithic integrated circuit.

    Auto-calibration circuit to minimize input offset voltage in an integrated circuit analog input device
    2.
    发明专利
    Auto-calibration circuit to minimize input offset voltage in an integrated circuit analog input device 未知

    公开(公告)号：AU1182302A

    公开(公告)日：2002-04-08

    申请号：AU1182302

    申请日：2001-09-28

    Applicant: MICROCHIP TECH INC

    Inventor： DARMAWASKITA HARTONO ,  EAGAR LAYTON ,  MORENO MIQUEL

    IPC: H03F3/45 ,  H03M1/10 ,  H03M1/12 ,  H03F1/30

    Abstract: An auto-calibration circuit minimizes input offset voltage in an integrated circuit analog input device. The auto-calibration circuit may also calibrate a plurality of analog input devices on an integrated circuit die or in a multi-chip package (MCP). The auto-calibration circuit and analog input device(s) may be fabricated in combination with a microcontroller system on an integrated circuit die or in an MCP. The auto-calibration circuit controls input offset voltage compensation circuit that counteracts or compensates for input offset voltage so as to minimize voltage error at the output of the analog input device. A digital control circuit applies a digital word to the input offset voltage compensation circuit for generating the required input offset voltage compensation. A linear search or binary search of various values of the digital word may be used by the digital control circuit. The digital control circuit switches the inputs, the output and feedback-gain determining resistors for the analog input device during a calibration mode. A voltage comparator compares the output of the analog input device and a voltage reference. When the output of the analog input device is equal to or greater than the voltage reference, the comparator output signals the digital control circuit by changing its output logic level. The input offset voltage compensation circuit of the analog input device has a storage register or memory that retains the digital word which compensates for the input offset voltage.

    INPUT VOLTAGE OFFSET CALIBRATION OF AN ANALOG DEVICE USING A MICROCONTROLLER
    3.
    发明申请
    INPUT VOLTAGE OFFSET CALIBRATION OF AN ANALOG DEVICE USING A MICROCONTROLLER 审中-公开
    使用微控制器的模拟器件的输入电压偏移校准

    公开(公告)号：WO0227942A2

    公开(公告)日：2002-04-04

    申请号：PCT/US0130585

    申请日：2001-09-28

    Applicant: MICROCHIP TECH INC

    Inventor： DARMAWASKITA HARTONO ,  MORENO MIQUEL

    IPC: H03F3/45 ,  H03M1/10 ,  H03M1/12 ,  H03F1/30

    CPC classification number: H03M1/1019 ,  H03F3/45977 ,  H03M1/12

    Abstract: Input offset voltage calibration of an analog device, or plurality of analog devices, is controlled by a microcontroller. The microcontroller and analog device(s) are fabricated on an integrated circuit die or in multi-chip package. The microcontroller applies a digital word to an input offset voltage compensation circuit of the analog device for generating input offset voltage compensation circuit of the analog device for generating input offset voltage compensation. The analog device is switched to a calibrate mode and a voltage comparator compares the output of the analog input device and a voltage reference. When the output of the analog input device is equal to or greater than the voltage reference, the comparator output signals the microcontroller by changing its output logic level. The input offset voltage compensation circuit of the analog input device has a storage register or memory that retains the digital word which compensates for the input device has a storage register or memory that retains the digital word which compensates for the input offset voltage.

    Abstract translation: 模拟设备或多个模拟设备的输入偏移电压校准由微控制器控制。 微控制器和模拟设备在集成电路管芯上或多芯片封装中制造。 微控制器将数字字应用于模拟装置的输入失调电压补偿电路，用于产生用于产生输入失调电压补偿的模拟装置的输入失调电压补偿电路。 模拟设备切换到校准模式，电压比较器比较模拟输入设备的输出和电压参考。 当模拟输入设备的输出等于或大于参考电压时，比较器输出通过改变其输出逻辑电平来发出信号。 模拟输入装置的输入失调电压补偿电路具有保存数字字的存储寄存器或存储器，该数字字补偿输入装置具有保存数字字的存储寄存器或存储器，该存储寄存器或存储器补偿输入失调电压。

    5.
    发明专利
    未知

    公开(公告)号：AT478388T

    公开(公告)日：2010-09-15

    申请号：AT08730948

    申请日：2008-02-28

    Applicant: MICROCHIP TECH INC

    Inventor： BUTLER DANIEL ,  DARMAWASKITA HARTONO

    IPC: G06F13/40

    Abstract: A low power Universal Serial Bus (USB) capable device uses a weak pull-up resistance that is coupled to at least one data line of the USB for detection of when the USB capable device is connected to a USB host or hub. When the USB capable device is not connected to the USB host or hub, USB peripheral, including the USB transceiver, USB voltage regulator, serial interface and/or USB logic circuits required for USB operation may be powered down to conserve power drawn by the USB capable device. When the USB capable device is connected to the USB host or hub, a voltage from the weak pull-up will be significantly reduced, thus signaling that the USB peripheral and associated circuits should be powered up for normal USB operation.

    Functional pathway configuration at a system/ic interface
    6.
    发明专利
    Functional pathway configuration at a system/ic interface 未知

    公开(公告)号：AU2002247034A1

    公开(公告)日：2002-08-06

    申请号：AU2002247034

    申请日：2002-01-25

    Applicant: MICROCHIP TECH INC

    Inventor： DARMAWASKITA HARTONO ,  ELLISON RYAN SCOTT

    IPC: G06F15/78

    Abstract: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor chip including an IC (e.g., computer chips like microcontrollers and microprocessors) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 20-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded.

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