公开(公告)号：US20150006713A1

公开(公告)日：2015-01-01

申请号：US13930955

申请日：2013-06-28

Applicant: Silicon Graphics International Corp.

Inventor： Daniel Thomas ,  John Baron ,  Michael Andrew Raymond

IPC: H04L12/26

CPC classification number: H04L43/0876 ,  H04L41/069 ,  H04L41/12 ,  H04L43/045 ,  H04L43/062 ,  H04L43/067 ,  H04L43/0888

Abstract: A method and computer program product for tracking network activity within a high performance computing environment is disclosed An application may be run in the high performance computing environment and a computation within the application may be performed in parallel on more than one processor. When the application is executed, data is gathered about the performance of hardware devices within the high performance computing environment and the clocking signals are adjusted to a global clock. The temporal data may be processed for a hardware device for a defined time period to develop one or more temporal performance metrics.Additionally, all activities that occur on a hardware device for a given time period can be determined and visualized.

Abstract translation: 公开了一种用于在高性能计算环境内跟踪网络活动的方法和计算机程序产品。应用可以在高性能计算环境中运行，并且应用程序内的计算可以在多于一个处理器上并行执行。 当执行应用程序时，将收集有关高性能计算环境中硬件设备性能​​的数据，并将时钟信号调整为全局时钟。 可以为硬件设备处理定义的时间段的时间数据以开发一个或多个时间性能度量。 此外，可以确定和可视化在给定时间段内在硬件设备上发生的所有活动。

公开(公告)号：US08892805B2

公开(公告)日：2014-11-18

申请号：US13788281

申请日：2013-03-07

Applicant: Silicon Graphics International Corp.

Inventor： Thomas Edward McGee

IPC: G06F13/00

CPC classification number: G06F13/4282 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

Abstract translation: 高性能计算系统提供有ASIC，其根据由另一设备定义的协议与系统中的另一设备进行通信。 ASIC以高速内容可寻址存储器（“CAM”）的形式耦合到可重配置协议表。 CAM包括用于控制由ASIC执行协议的指令。 CAM可以包括在执行协议时遇到意外的信号或其他错误的情况下控制ASIC的指令。 内部ASIC状态数据可以路由到CAM，以允许ASIC在ASIC或其正在通信的设备的设计或制造中产生对错误的合理响应。

公开(公告)号：US20140281211A1

公开(公告)日：2014-09-18

申请号：US13836073

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： Lance MacKimmie Evans ,  Kevan Flint Rehm ,  Phil Armstrong

IPC: G06F3/06

CPC classification number: G06F3/0647 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0652 ,  G06F3/0685 ,  G06F3/0689

Abstract: A fast mount cache is provided by any offline storage media for fast volume mount access. The fast mount cache may be used as the first level in a hierarchical storage configuration after the high performance tier for data having high access rates shortly after creation but decreases sharply as the data ages. The fast mount cache stores migrated data from online hard disk drive storage and maintains the data on a volume basis as opposed to a file basis. As the fast mount cache capacity fills, or other events occur triggering a volume change, the fast mount cache erases the volume having the oldest data. While data is maintained on the fast mount cache for periods of time soon after it is migrated, the data may be accessed quickly. After the initial period of time has expired, the data only exists on tape storage or low tier data.

Abstract translation: 任何脱机存储介质都提供快速安装缓存，以实现快速卷安装访问。 快速安装缓存可以用作分层存储配置中的第一级，在高性能层之后，数据在创建后不久具有高访问速率，但随着数据的老化而急剧下降。 快速安装缓存存储从在线硬盘驱动器存储的迁移数据，并以数据为基础维护数据，而不是基于文件。 随着快速安装缓存容量的填满，或其他事件触发卷更改，快速安装缓存会擦除具有最早数据的卷。 虽然数据在迁移后很快就会在快速安装缓存上维护一段时间，但数据可能会被快速访问。 在初始时间段到期后，数据仅存在于磁带存储或低层数据上。

公开(公告)号：US20140281036A1

公开(公告)日：2014-09-18

申请号：US13828896

申请日：2013-03-14

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Robert W. Cutler ,  Dimitri George Sivanich

IPC: H04L29/08

CPC classification number: H04L67/1095 ,  G06F9/4825 ,  H04J3/0667

Abstract: A method, system and program code for synchronizing scheduler interrupts across multiple nodes of a cluster. Network timers and local scheduling timers are clocked off a system source clock. A processor in each computing node repeatedly reads a network time of day counter. The start of scheduler interrupts is synchronized when the time of day counter is at an integer multiple of a synchronizing integer number of network timer ticks. The processor sends an interprocessor scheduler interrupt to other processors in the node to synchronize scheduling timers in the computing node and throughout the cluster.

Abstract translation: 用于在群集的多个节点上同步调度程序中断的方法，系统和程序代码。 网络定时器和本地调度定时器从系统源时钟计时。 每个计算节点中的一个处理器重复读取一天的网络时间计数器。 当日间计数器的时间是同步整数个网络计时器滴答的整数倍时，调度程序中断的开始是同步的。 处理器向节点中的其他处理器发送处理器间调度器中断，以同步计算节点和整个集群中的调度计时器。

公开(公告)号：US20140280957A1

公开(公告)日：2014-09-18

申请号：US13831671

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： Charles Robert Martin ,  Lance MacKimmie Evans

IPC: H04L12/911

CPC classification number: H04L47/70 ,  H04L41/022 ,  H04L41/0226

Abstract: Embodiments of the invention include software that provides an operator or a system service the ability to access, control, or configure a plurality of different data center resources using common sets of functions or commands even though those data center resources natively require different commands to access, control, or configure them. The invention is configured to accept common commands and then translate them from a common command format into device specific commands or command sets. The invention simplifies how data center equipment is controlled and configured.

Abstract translation: 本发明的实施例包括为操作者或系统服务提供访问，控制或配置多个不同数据中心资源的功能的软件，即使这些数据中心资源本身需要不同的访问命令， 控制或配置它们。 本发明被配置为接受公共命令，然后将它们从公共命令格式转换成特定于设备的命令或命令集。 本发明简化了数据中心设备的控制和配置。

公开(公告)号：US20140279919A1

公开(公告)日：2014-09-18

申请号：US13831771

申请日：2013-03-15

Applicant: Silicon Graphics International Corp.

Inventor： John Michael Sygulla ,  Arun Ramakrishnan ,  Greg Slowiak

IPC: G06F11/14

CPC classification number: G06F11/1469 ,  G06F11/1451 ,  G06F2201/84

Abstract: Data state rollover is performed based on data state snapshots and deltas. A series of snapshots is taken of the current data state, an original data state, and data states in between. Deltas are then generated between two sequential snapshots. This results in numerous deltas which represent the difference between consecutive snapshots. Once the deltas are acquired, the deltas may be stored along with the snapshot of the present data state. As such, previous data states may be rolled back to by determining the number of deltas to apply to the current data state to achieve the desired previous data state. In cases where the rollback or rollover fails, deltas may be played against the current data state to a point where the last known trusted and working data point existed.

Abstract translation: 基于数据状态快照和三角形执行数据状态翻转。 拍摄当前数据状态，原始数据状态以及之间的数据状态的一系列快照。 然后在两个顺序快照之间生成Deltas。 这导致许多三角形表示连续快照之间的区别。 一旦获得了三角洲，三角形可以与当前数据状态的快照一起存储。 这样，先前的数据状态可以通过确定应用于当前数据状态以达到期望的先前数据状态的增量的数量来回滚。 在回滚或翻转失败的情况下，可能会对当前数据状态进行三角波，直到最后一个已知的可信和工作数据点存在。

公开(公告)号：US20140258679A1

公开(公告)日：2014-09-11

申请号：US13788281

申请日：2013-03-07

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： Thomas Edward McGee

IPC: G06F15/78

CPC classification number: G06F13/4282 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

Abstract translation: 高性能计算系统提供有ASIC，其根据由另一设备定义的协议与系统中的另一设备进行通信。 ASIC以高速内容可寻址存储器（“CAM”）的形式耦合到可重配置协议表。 CAM包括用于控制由ASIC执行协议的指令。 CAM可以包括在执行协议时遇到意外的信号或其他错误的情况下控制ASIC的指令。 内部ASIC状态数据可以路由到CAM，以允许ASIC在ASIC或其正在通信的设备的设计或制造中产生对错误的合理响应。

公开(公告)号：US20140245079A1

公开(公告)日：2014-08-28

申请号：US13780248

申请日：2013-02-28

Applicant: Silicon Graphics International Corp.

Inventor： Mark Larson ,  Michael Brown ,  Gary Meyer

IPC: G06F11/07

CPC classification number: G06F11/0772 ,  G06F11/0724 ,  G06F11/25

Abstract: Error data is read from error registers and written into a buffer. A computing node uses a BIOS to read the error data, rearm the error register and write the data into a memory mapped buffer. A hub chip supports creation of a shared memory system of computing nodes. A management controller in the computing node extracts error data from the buffer. The error data preferably consists essentially of the error register identifiers and the contents of the error registers. A system management node receives the error data from the management controllers in the computing nodes. The system management node may be coupled to but separate from the computing nodes.

Abstract translation: 错误数据从错误寄存器中读取并写入缓冲区。 计算节点使用BIOS读取错误数据，重新设置错误寄存器并将数据写入存储器映射缓冲区。 集线器芯片支持创建计算节点的共享存储器系统。 计算节点中的管理控制器从缓冲器中提取错误数据。 错误数据优选地基本上由错误寄存器标识符和错误寄存器的内容组成。 系统管理节点从计算节点中的管理控制器接收错误数据。 系统管理节点可以耦合到但是与计算节点分离。

公开(公告)号：US20140188955A1

公开(公告)日：2014-07-03

申请号：US14199619

申请日：2014-03-06

Applicant: Silicon Graphics International Corp.

Inventor： Kenneth S. Beck

IPC: G06F17/30

CPC classification number: G06F17/30194 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/067 ,  G06F11/2064 ,  G06F11/2082 ,  G06F17/30067 ,  G06F17/30088 ,  G06F2201/84 ,  H04L29/06 ,  H04L67/10 ,  H04L67/1097 ,  H04L67/2819 ,  H04L67/2833 ,  Y10S707/966

Abstract: A computer system with read/write access to storage devices creates a snapshot of a data volume at a point in time while continuing to accept access requests to the mirrored data volume by copying before making changes to the base data volume. Multiple snapshots may be made of the same data volume at different points in time. Only data that is not stored in a previous snapshot volume or in the base data volume are stored in the most recent snapshot volume.

Abstract translation: 具有对存储设备的读/写访问权限的计算机系统在某个时间点创建数据卷的快照，同时在对基本数据卷进行更改之前，继续通过复制接受对镜像数据卷的访问请求。 可以在不同的时间点对同一数据量做多个快照。 只有不存储在先前快照卷或基本数据卷中的数据才会存储在最新的快照卷中。

公开(公告)号：US20140068627A1

公开(公告)日：2014-03-06

申请号：US13931819

申请日：2013-06-29

Applicant: Silicon Graphics International Corp.

Inventor： Eng Lim Goh ,  Christian Tanasescu ,  George L. Thomas ,  CHarlton Port

IPC: G06F9/50

CPC classification number: G06F9/5094 ,  G06F1/206 ,  G06F1/3228 ,  G06F1/329 ,  G06F9/4893 ,  G06F9/5083 ,  G06F11/0754 ,  G06F11/3006 ,  G06F11/3058 ,  G06N5/00 ,  Y02D10/16 ,  Y02D10/22 ,  Y02D10/24

Abstract: Embodiments of the invention relate to a system and method for dynamically scheduling resources using policies to self-optimize resource workloads in a data center. The object of the invention is to allocate resources in the data center dynamically corresponding to a set of policies that are configured by an administrator. Operational parametrics that correlate to the cost of ownership of the data center are monitored and compared to the set of policies configured by the administrator. When the operational parametrics approach or exceed levels that correspond to the set of policies, workloads in the data center are adjusted with the goal of minimizing the cost of ownership of the data center. Such parametrics include yet are not limited to those that relate to resiliency, power balancing, power consumption, power management, error rate, maintenance, and performance.

Abstract translation: 本发明的实施例涉及使用策略自动调度资源以自我优化数据中心中的资源工作负载的系统和方法。 本发明的目的是动态地分配数据中心中的资源，与由管理员配置的一组策略相对应。 与数据中心所有权成本相关的操作参数被监控，并与管理员配置的一组策略进行比较。 当操作参数方法或超过对应于一组策略的级别时，调整数据中心的工作负载，以最小化数据中心的所有权成本。 这样的参数包括但不限于与弹性，功率平衡，功耗，功率管理，错误率，维护和性能相关的参数。