公开(公告)号：EP0696045B1

公开(公告)日：1999-10-13

申请号：EP95410079.8

申请日：1995-08-02

Applicant: PIXTECH SA

Inventor： Clerc, Jean-Frédéric

IPC: H01J1/30 ,  H01J9/02

CPC classification number: H01J1/3042 ,  H01J2201/319 ,  H01J2329/00

公开(公告)号：EP0923788A1

公开(公告)日：1999-06-23

申请号：EP97939819.0

申请日：1997-09-04

Applicant: Micron Technology, Inc.

Inventor： CATHEY, David, A. ,  HUSH, Glen, E. ,  MA, Manny, K., F. ,  DUNHAM, Craig, M. ,  ZIMLICH, David, A.

IPC: H01J29 ,  G09G3 ,  H01J3 ,  H01J31

CPC classification number: H01J31/127 ,  H01J3/022 ,  H01J2201/319 ,  H01J2329/92

Abstract: A field emission display includes electrostatic discharge protection circuits coupled to an emitter substrate and an extraction grid. In the preferred embodiment, the electrostatic discharge circuit includes diodes reverse biased between grid sections and a first reference potential or between row lines and a second reference potential. The diodes provide a current path to discharge static voltage and thereby prevent a high voltage differential from being maintained between the emitter sets and the extraction grids. The diodes thereby prevent the emitter sets from emitting electrons at a high rate that may damage or destroy the emitter sets. In one embodiment, the diodes are coupled directly between the grid sections and the row lines. In one embodiment, the diodes are formed in an insulative layer carrying the grid sections. In another embodiment, the diodes are integrated into the emitter substrate.

公开(公告)号：EP0876676A2

公开(公告)日：1998-11-11

申请号：EP96927441.0

申请日：1996-08-19

Applicant: FED CORPORATION

Inventor： JONES, Gary, W. ,  ZIMMERMAN, Steven, M. ,  SILVERNAIL, Jeffrey, A. ,  JONES, Susan, K., Schwartz

IPC: H01J1 ,  H01J3 ,  H01J9

CPC classification number: H01J9/025 ,  H01J3/022 ,  H01J2201/319 ,  H01J2329/00 ,  Y10S428/938

Abstract: A field emitter device formed by a veil process wherein a protective layer including a release layer is deposited on a gate electrode layer (62) for the device, the protective layer overlaying the circumscribing peripheral edge of the opening of the gate electrode layer (62) to protect the edge of the gate electrode layer (62) during etching of a field emitter cavity (72) in a dielectric material layer (30) on a substrate (12) and during the formation of a field emitter element (40) in the cavity by depositing a field emitter material through the opening (72). The protective layer is readily removed subsequent to completion of the cavity etching formation steps, to yield the field emitter device. The field emission device further includes a current limiter composition (14) for permitting high frequency emission of electrons from the field emitter element (40) at low turn-on voltage.

公开(公告)号：EP0868752A1

公开(公告)日：1998-10-07

申请号：EP96944915.0

申请日：1996-12-20

Applicant: ADVANCED TECHNOLOGY MATERIALS, INC. ,  Candescent Technologies Corporation

Inventor： BEETZ, Charles, P. ,  XU, Xueping ,  BRANDES, George, R. ,  RAMANI, Swayambu ,  BESSER, Ronald, S.

IPC: H01J9 ,  H01J1 ,  H01J19 ,  H01J21 ,  H01J29 ,  H01J31 ,  H01L21 ,  H01L27 ,  H01L31

CPC classification number: H01L28/20 ,  H01J1/3042 ,  H01J2201/30403 ,  H01J2201/319 ,  H01J2329/00 ,  H01L31/03765 ,  Y02E10/548 ,  Y10S438/931

Abstract: Integrated circuits (10), including field emission devices (7), have a resistor element (4) of amorphous SixC1-x wherein 0∫x∫1, and wherein the SixC1-x incorporates at least one impurity selected from the group consisting of hydrogen, halogens, nitrogen, oxygen, sulphur, selenium, transition metals, boron, aluminum, phosphorus, gallium, arsenic, lithium, beryllium, sodium and magnesium.

公开(公告)号：EP0589523B1

公开(公告)日：1997-12-17

申请号：EP93202700.6

申请日：1993-09-17

Applicant: Philips Electronics N.V.

Inventor： Harberts, Dirk Willem ,  Kuijk, Karel Elbert ,  Horne, Remco ,  van Veen, Gerardus Nicolaas Anne ,  Bechtel, Hans-Helmut

IPC: H01J31/12

CPC classification number: G09G3/22 ,  G09G2300/08 ,  H01J31/127 ,  H01J2201/319

公开(公告)号：EP0514474B1

公开(公告)日：1997-11-05

申请号：EP91904620.1

申请日：1991-01-18

Applicant: MOTOROLA, INC.

Inventor： KANE, Robert, C.

IPC: H01J1/30 ,  H01J21/10 ,  H01J3/02

CPC classification number: H01J7/44 ,  H01J3/022 ,  H01J2201/319

Abstract: A cold cathode field emission device that includes a ballast resistor (202, 303, 402) integrally formed therewith and coupled to the emitter (204, 302, 403) to allow appropriate compensation for manufacturing and performance variations in field emission from the attached emitter.

公开(公告)号：EP0776493A2

公开(公告)日：1997-06-04

申请号：EP95930135.0

申请日：1995-08-09

Applicant: FED CORPORATION

Inventor： JONES, Gary, W.

IPC: G02B27 ,  G09G3 ,  H01J3 ,  H01J9 ,  H01J29 ,  H01J31 ,  H04N5 ,  H04N13

CPC classification number: G09G3/025 ,  G02B27/017 ,  G02B27/0172 ,  G02B27/0176 ,  G02B27/2235 ,  G02B2027/0132 ,  G02B2027/0136 ,  G09G3/001 ,  H01J3/022 ,  H01J9/025 ,  H01J29/94 ,  H01J31/127 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2209/385 ,  H01J2329/00 ,  H01J2329/8625 ,  H04N5/70 ,  H04N5/7408 ,  H04N5/7491 ,  H04N13/194 ,  H04N13/286 ,  H04N13/324 ,  H04N13/341 ,  H04N13/344 ,  H04N13/361 ,  H04N13/363 ,  H04N13/365 ,  H04N13/398

Abstract: An imaging apparatus (100) for providing an image from a display (106) to an observer (101), comprising: a display (106) generating an optical output, an imaging surface member (109) constructed and arranged for viewing by said observer, and a scanning mirror/lens assembly (102) optically interposed between the display and the imaging surface member, and constructed and arranged to motively repetitively scan the display, generate a scanned image, and transmit the scanned image to the imaging surface member, for viewing of the scanned image. Various field emitter display designs and subassemblies are described, which may be usefully employed in such imaging apparatus.

公开(公告)号：EP0729168A2

公开(公告)日：1996-08-28

申请号：EP96106465.6

申请日：1994-04-05

Applicant: CANON KABUSHIKI KAISHA

Inventor： Suzuki, Hidetoshi ,  Osada, Yoshiyuki ,  Nomura, Ichiro ,  Ono, Takeo ,  Kawade, Hisaaki ,  Yamaguchi, Eiji ,  Takeda,Toshihiko, c/o Canon K.K. ,  Toshima,Hiroaki, c/o Canon K.K. ,  Hamamoto,Hiroaki, c/o Canon K.K. ,  Iwasaki,Tatsuya, c/o Canon K.K. ,  Isono,Aoji, c/o Canon K.K. ,  Suzuki,Noritake, c/o Canon K.K. ,  Todokoro,Yasuyuki, c/o Canon K.K. ,  Okuda,Masahiro, c/o Canon K.K. ,  Shinjo,Katsuhiko, c/o Canon K.K.

IPC: H01J1/30 ,  H01J31/12

CPC classification number: H01J1/316 ,  G09G3/22 ,  G09G2300/0885 ,  G09G2310/06 ,  H01J9/027 ,  H01J31/127 ,  H01J2201/3165 ,  H01J2201/319 ,  H01J2329/00

Abstract: A method of manufacturing an electron source having a plurality of surface-conduction electron-emitting devices arranged on a substrate in row and column directions includes the forming of electron emission portions of the plurality of surface-conduction electron-emitting devices. The forming is carried out by supplying current through the plurality of surface-conduction electron-emitting devices upon dividing them into a plurality of groups. An image forming apparatus passes a current through a plurality of electron sources, which are formed on a substrate and arrayed in the form of a matrix, in dependence upon an image signal, and an image is formed by a light emission in response to electrons emitted from the plurality of electron sources.

Abstract translation: 制造具有设置在上行和列方向一基板表面传导电子发射器件的多个电子源的的方法，包括表面传导电子发射器件的多个电子发射部分的形成。 成形是通过在将它们划分成组的多个贯通表面传导电子发射器件的多个供电流下进行。 一种图像形成装置穿过的电子源，其是在图像信号上形成的基片和在一个矩阵的形式排列，在依赖的多个电流，一个图像是由发光响应形成为所发射的电子 从电子源的多元性。

公开(公告)号：EP0572170B1

公开(公告)日：1996-02-28

申请号：EP93303907.5

申请日：1993-05-20

Applicant: AT&T Corp.

Inventor： Kochanski, Gregory Peter

IPC: H01J31/12 ,  H01J3/02

CPC classification number: H01J3/022 ,  H01J31/127 ,  H01J2201/319

公开(公告)号：EP0696045A1

公开(公告)日：1996-02-07

申请号：EP95410079.8

申请日：1995-08-02

Applicant: PIXEL INTERNATIONAL S.A.

Inventor： Clerc, Jean-Frédéric

IPC: H01J1/30 ,  H01J9/02

CPC classification number: H01J1/3042 ,  H01J2201/319 ,  H01J2329/00

Abstract: L'invention concerne une cathode (1) à micropointes pour écran plat de visualisation, du type comportant un substrat (10), au moins un conducteur de cathode (13), et des micropointes (2) disposées sur une couche résistive (11) ; ledit conducteur de cathode (13) étant disposé au-dessus de la couche résistive (11), et présentant des ouvertures circulaires (17) au centre de chacune desquelles est disposée une micro-pointe (2).

Abstract translation: 阴极（1）包括绝缘基板（10）和支撑微尖端阵列（2）的电阻层（11）。 阴极导体（13）通过薄导体涂层（19）放置在电阻层的顶部上。 导体以列（15）的方式组织，每列包含大量微型尖端。 微型尖端位于沿着阴极导体存在的圆形开口（17）的中心。 因此，每个微尖端通过具有相同电阻率的圆形区域与导体分离。 控制栅格（3）与阴极相关联并且通过两个绝缘层（16,18）与导体分离。