公开(公告)号：US09558933B2

公开(公告)日：2017-01-31

申请号：US14920379

申请日：2015-10-22

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Markus Zundel ,  Anton Mauder ,  Andreas Meiser ,  Franz Hirler ,  Hans Weber

IPC: H01L21/425 ,  H01L21/02 ,  H01L21/265 ,  H01L21/321 ,  H01L29/66

CPC classification number: H01L21/02258 ,  H01L21/02164 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02299 ,  H01L21/02345 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/32105 ,  H01L29/66325 ,  H01L29/66477

Abstract: A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.

Abstract translation: 一种形成半导体器件的方法包括：通过在半导体衬底和半导体衬底内的外部电极之间产生吸引电场，在半导体衬底的表面上进行半导体衬底的表面区域的阳极氧化以形成氧化物层 以吸引电解质的氧化离子，引起半导体衬底的表面区域的氧化。 此外，该方法包括减少氧化物层内剩余氧化离子的数量，同时半导体衬底在电解质内。

公开(公告)号：US20160322464A1

公开(公告)日：2016-11-03

申请号：US15139758

申请日：2016-04-27

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/4175 ,  H01L21/2255 ,  H01L21/26586 ,  H01L27/156 ,  H01L29/063 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66621 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/66696 ,  H01L29/66704 ,  H01L29/7825 ,  H01L29/7835

Abstract: A semiconductor device comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region, and the gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction, the body region being adjacent to the source region and the drain region. The semiconductor device further comprises a source contact and a body contact, the source contact being electrically connected to a source terminal, the body contact being electrically connected to the source contact and to the body region.

Abstract translation: 半导体器件包括具有第一主表面的半导体衬底中的场效应晶体管。 场效应晶体管包括源区域，漏极区域，体区域和在体区域处的栅电极。 栅极被配置为控制在体区中形成的沟道的导电性，并且栅电极设置在栅极沟槽中。 主体区域沿着源极区域和漏极区域之间的第一方向设置，第一方向平行于第一主表面。 主体区域具有沿着第一方向延伸的脊的形状，主体区域与源区域和漏极区域相邻。 所述半导体器件还包括源极接触和主体接触，所述源极触点电连接到源极端子，所述主体触点电连接到所述源极触点和所述主体区域。

公开(公告)号：US20160308044A1

公开(公告)日：2016-10-20

申请号：US15095615

申请日：2016-04-11

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/40 ,  H01L29/06

CPC classification number: H01L29/7825 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0869 ,  H01L29/0886 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/66787

Abstract: A semiconductor device comprises a transistor in a semiconductor body having a first main surface. The transistor comprises a source region of a first conductivity type, a drain region, a body region of a second conductivity type, different from the first conductivity type, and a gate electrode disposed in gate trenches extending in a first direction parallel to the first main surface. The source region, the body region and the drain region are arranged along the first direction. The body region comprises first ridges extending along the first direction, the first ridges being disposed between adjacent gate trenches in the semiconductor body. The body region further comprises a second ridge. A width of the second ridge is larger than a width of the first ridges, the widths being measured in a second direction perpendicular to the first direction.

Abstract translation: 半导体器件包括具有第一主表面的半导体本体中的晶体管。 晶体管包括不同于第一导电类型的第一导电类型的源极区域，漏极区域，第二导电类型的体区域，以及设置在沿与第一主体平行的第一方向延伸的栅极沟槽中的栅电极 表面。 源极区域，主体区域和漏极区域沿着第一方向布置。 主体区域包括沿着第一方向延伸的第一脊，第一脊设置在半导体本体中的相邻栅极沟槽之间。 身体区域还包括第二脊。 第二脊的宽度大于第一脊的宽度，宽度在垂直于第一方向的第二方向上被测量。

公开(公告)号：US20160307996A1

公开(公告)日：2016-10-20

申请号：US15081423

申请日：2016-03-25

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/265 ,  H01L29/78 ,  H01L29/45

CPC classification number: H01L29/0634 ,  H01L21/26586 ,  H01L29/0649 ,  H01L29/0696 ,  H01L29/1008 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/45 ,  H01L29/66696 ,  H01L29/66704 ,  H01L29/66719 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7824 ,  H01L29/7825

Abstract: A semiconductor device comprises a transistor in a semiconductor body having a first main surface and a second main surface, the first main surface being opposite to the second main surface. The transistor comprises a source region at the first main surface, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The gate electrode is disposed in trenches extending in the first direction. The transistor further comprises an insulating layer adjacent to the second main surface of the body region. The source region vertically extends to the second main surface.

Abstract translation: 半导体器件包括在具有第一主表面和第二主表面的半导体本体中的晶体管，第一主表面与第二主表面相对。 晶体管包括在第一主表面处的源极区域，漏极区域，体区域，漂移区域和在体区域处的栅电极。 主体区域和漂移区域沿着源极区域和漏极区域之间的第一方向设置，第一方向平行于第一主表面。 栅电极设置在沿第一方向延伸的沟槽中。 晶体管还包括与身体区域的第二主表面相邻的绝缘层。 源极区垂直延伸到第二主表面。

公开(公告)号：US09450085B2

公开(公告)日：2016-09-20

申请号：US14548375

申请日：2014-11-20

Applicant: Infineon Technologies AG

Inventor： Till Schloesser ,  Andreas Meiser

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/7813 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66734

Abstract: A semiconductor device includes a semiconductor substrate having first regions of a first conductivity type and body regions of the first conductivity type, which are arranged in a manner adjoining the first region and overlap the latter in each case on a side of the first region which faces a first surface of the semiconductor substrate, and having a multiplicity of drift zone regions arranged between the first regions and composed of a semiconductor material of a second conductivity type, which is different than the first conductivity type. The first regions and the drift zone regions are arranged alternately and form a superjunction structure. The semiconductor device further includes a gate electrode formed in a trench in the semiconductor substrate.

Abstract translation: 半导体器件包括具有第一导电类型的第一区域和第一导电类型的主体区域的半导体衬底，它们以与第一区域相邻的方式布置，并且在每种情况下与第一区域的第一区域重叠， 半导体衬底的第一表面，并且具有布置在第一区域之间并由与第一导电类型不同的第二导电类型的半导体材料构成的多个漂移区域。 第一区域和漂移区域交替布置并形成超结构结构。 半导体器件还包括形成在半导体衬底中的沟槽中的栅电极。

公开(公告)号：US09362371B2

公开(公告)日：2016-06-07

申请号：US14712178

申请日：2015-05-14

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Markus Zundel

IPC: H01L21/28 ,  H01L21/74 ,  H01L21/768 ,  H01L29/40 ,  H01L29/49 ,  H01L23/48 ,  H01L29/423 ,  H01L29/78 ,  H01L29/51

CPC classification number: H01L29/7813 ,  H01L21/28008 ,  H01L21/28229 ,  H01L21/743 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/51 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. The first trench has a first width and a first depth, and the second trench has a second width greater than the first width and a second depth greater than the first depth. The method further includes forming, in a common process, an oxide layer in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench, and removing the oxide layer from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.

Abstract translation: 一种制造可控半导体部件的方法包括提供具有顶侧和底侧的半导体本体，以及形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。 第一沟槽具有第一宽度和第一深度，并且第二沟槽具有大于第一宽度的第二宽度和大于第一深度的第二深度。 该方法还包括在公共工艺中形成第一沟槽和第二沟槽中的氧化物层，使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘，并且从第一沟槽中去除氧化物层 沟槽完全或至少部分地使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。

公开(公告)号：US09263619B2

公开(公告)日：2016-02-16

申请号：US14020391

申请日：2013-09-06

Applicant: Infineon Technologies AG

Inventor： Joost Willemen ,  Michael Mayerhofer ,  Ulrich Glaser ,  Yiqun Cao ,  Andreas Meiser ,  Magnus-Maria Hell ,  Matthias Stecher ,  Julien Lebon

IPC: H01L27/15 ,  H01L31/173 ,  H01L27/02

CPC classification number: H01L31/173 ,  H01L27/0255 ,  H01L27/0629 ,  H01L27/15 ,  H01L29/808 ,  H02H3/20

Abstract: A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. An electrical coupling and an optical coupling between the auxiliary semiconductor device and the semiconductor device are configured to trigger emission of radiation by the auxiliary semiconductor device and to trigger avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device. The semiconductor device includes a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer.

Abstract translation: 半导体部件包括被配置为发射辐射的辅助半导体器件。 半导体部件还包括半导体器件。 辅助半导体器件和半导体器件之间的电耦合和光耦合被配置为触发辅助半导体器件的辐射发射，并通过吸收半导体器件中的辐射来触发半导体器件中的雪崩击穿。 半导体器件包括埋在半导体主体的表面下方的第一导电类型的第一层和布置在表面和第一层之间的第二导电类型的掺杂半导体区域之间的pn结。

公开(公告)号：US09148923B2

公开(公告)日：2015-09-29

申请号：US14138328

申请日：2013-12-23

Applicant: Infineon Technologies AG

Inventor： Andrea Logiudice ,  Andreas Meiser

IPC: H01L29/66 ,  H05B33/08 ,  H05B37/03

CPC classification number: H05B37/03 ,  G09G3/006 ,  H01L33/0095 ,  H05B33/0824 ,  H05B33/083 ,  Y10T29/49117 ,  Y10T307/406

Abstract: In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate includes a plurality of driver circuits at the first side of the substrate. Each of the plurality of driver circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further includes at least one load interface at the second side of the substrate. The at least one load interface is configured to couple the current from the plurality of the driver circuits to a plurality of loads at the second side of the substrate.

Abstract translation: 在各种实施例中，提供了一种装置。 该装置包括具有第一侧和与第一侧相对的第二侧的基板。 衬底在衬底的第一侧包括多个驱动电路。 多个驱动电路中的每一个被配置为驱动从衬底的第一侧到衬底的第二侧的电流。 该装置还包括在基板的第二侧的至少一个负载界面。 所述至少一个负载接口被配置为将来自所述多个驱动器电路的电流耦合到所述衬底的第二侧处的多个负载。

公开(公告)号：US20150162418A1

公开(公告)日：2015-06-11

申请号：US14102290

申请日：2013-12-10

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Anton Mauder ,  Markus Zundel ,  Hans-Joachim Schulze ,  Franz Hirler ,  Hans Weber

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/306 ,  H01L29/06

CPC classification number: H01L29/66333 ,  H01L21/02118 ,  H01L21/0223 ,  H01L21/02238 ,  H01L21/02258 ,  H01L21/30604 ,  H01L21/76831 ,  H01L21/76898 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/402 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/861

Abstract: A method for forming a semiconductor device includes forming an electrical structure at a main surface of a semiconductor substrate and carrying out an anodic oxidation of a back side surface region of a back side surface of the semiconductor substrate to form an oxide layer at the back side surface of the semiconductor substrate.

Abstract translation: 一种形成半导体器件的方法包括在半导体衬底的主表面上形成电结构，并对半导体衬底的背面表面的背面表面区进行阳极氧化，以在后侧形成氧化物层 半导体衬底的表面。

公开(公告)号：US09054181B2

公开(公告)日：2015-06-09

申请号：US13828894

申请日：2013-03-14

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L27/01 ,  H01L27/12 ,  H01L31/0392 ,  H01L29/78 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4983 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7818 ,  H01L29/7824 ,  H01L29/7835

Abstract: A semiconductor device includes a transistor. The transistor includes a source region, a drain region, a body region, a drift zone, and a gate electrode being adjacent to the body region. The body region, the drift zone, the source region and the drain region are disposed in a first semiconductor layer having a first main surface. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The transistor further includes a drift control region arranged adjacent to the drift zone, the drift control region being disposed over the first main surface.

Abstract translation: 半导体器件包括晶体管。 晶体管包括源区域，漏极区域，体区域，漂移区域和与身体区域相邻的栅电极。 体区，漂移区，源区和漏区设置在具有第一主表面的第一半导体层中。 主体区域和漂移区域沿着源极区域和漏极区域之间的第一方向设置，第一方向平行于第一主表面。 晶体管还包括与漂移区相邻布置的漂移控制区，漂移控制区设置在第一主表面上。