公开(公告)号：US20120126094A1

公开(公告)日：2012-05-24

申请号：US13293969

申请日：2011-11-10

Applicant: Laurent Simony ,  Benoit Deschamps ,  Alexandre Cellier ,  Frédéric Barbier

Inventor： Laurent Simony ,  Benoit Deschamps ,  Alexandre Cellier ,  Frédéric Barbier

IPC: H01L27/146 ,  H03M1/56 ,  H03M1/00 ,  H03M1/58

CPC classification number: H03M1/58 ,  H03M1/201 ,  H03M1/56

Abstract: A method of analog to digital voltage conversion including: generating a quadratic signal based on an analog time varying reference signal; generating a ramp signal based on the quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of the analog input voltage with the ramp signal.

Abstract translation: 一种模数电压转换方法，包括：基于模拟时变参考信号产生二次信号; 基于二次信号产生斜坡信号; 并且基于通过模拟输入电压与斜坡信号的比较确定的持续时间，将模拟输入电压转换为数字输出值。

公开(公告)号：US20120007761A1

公开(公告)日：2012-01-12

申请号：US13161994

申请日：2011-06-16

Applicant: Masato NAKADA

Inventor： Masato NAKADA

IPC: H03M1/12

CPC classification number: H03M1/201

Abstract: An AD conversion apparatus includes a shift signal generating portion configured to generate n shift signals (n is a natural number greater than one) of which amplitudes are different from each other; a shift signal controlling portion configured to control the shift signal generating portion; a compounding portion configured to compound input analog signal and the n shift signals sequentially into n first signals; an AD converting portion configured to execute AD conversion to convert the n first signals into n second signals; and a signal processing portion configured to calculate an average of the n second signals to generate output digital signal.

Abstract translation: AD转换装置包括：移位信号产生部分，被配置为产生振幅彼此不同的n个移位信号（n是大于1的自然数）; 移位信号控制部，被配置为控制所述移位信号生成部; 复合部，被配置为将输入模拟信号和所述n个移位信号顺序地复合成n个第一信号; AD转换部分，被配置为执行AD转换以将n个第一信号转换为n个第二信号; 以及信号处理部，被配置为计算所述n个第二信号的平均值以产生输出数字信号。

公开(公告)号：US06894631B1

公开(公告)日：2005-05-17

申请号：US10814661

申请日：2004-03-31

Applicant: Scott Gregory Bardsley

Inventor： Scott Gregory Bardsley

IPC: H03M1/20 ,  H03M1/44 ,  H03M1/10

CPC classification number: H03M1/201 ,  H03M1/44

Abstract: An pipeline analog-to-digital converter (ADC) is provided that is capable of applying calibration at a resolution greater than the resolution of a digital output signal provided by the ADC. The ADC includes a calibration component adapted to apply calibration bits to digital output bits generated by stages of the pipeline and corresponding to samples of an analog input signal. The ADC also includes a random number generator that provides at least one random bit having a sub-LSB bit weight. The calibration bits and the at least one random bit are applied as a dither to the digital output bits such that, on average, the digital output signal provided by the ADC is calibrated at a sub-LSB resolution.

Abstract translation: 提供了一种能够以比ADC提供的数字输出信号的分辨率大的分辨率进行校准的流水线模数转换器（ADC）。 ADC包括校准组件，该校准组件适于将校准位应用于由流水线的阶段产生的对应于模拟输入信号的采样的数字输出位。 ADC还包括随机数发生器，其提供至少一个具有子LSB位权重的随机位。 校准位和至少一个随机位作为抖动施加到数字输出位，使得平均来说，由ADC提供的数字输出信号以sub-LSB分辨率进行校准。

公开(公告)号：US6016113A

公开(公告)日：2000-01-18

申请号：US882826

申请日：1997-06-26

Applicant: Yehuda Binder

Inventor： Yehuda Binder

IPC: H03M1/20 ,  H03M1/66

CPC classification number: H03M1/207 ,  H03M1/201 ,  H03M1/203 ,  H03M1/66

Abstract: An apparatus for and method of enhancing the accuracy of analog-digital-analog conversions achieves improved accuracy by generating a dither signal which is combined with an input analog signal before the analog input signal is converted to digital form. The combined input analog/dither signal is then converted to digital. The digital signal is then processed or delayed in accordance with the desired function to be performed by the circuit. After digital processing, the digital values are converted back into analog form and the dither signal subsequently removed from the output signal. In addition, an apparatus for and method of enhancing the accuracy of analog-digital-analog conversions that does not utilize an explicit dither signal, utilizes linear interpolation techniques to achieve the effect of a pseudo dither signal. Similarly, time multiplexing techniques are also used to achieve the same effect. The principles of the present invention are applicable in systems that generate analog signals using consecutive digital samples. The resultant output signals from such systems exhibit improved accuracy, lower distortion and higher resolution. The present invention can also be utilized to maintain the original output resolution while requiring fewer bits to represent the digital samples.

Abstract translation: 用于提高模拟数字 - 模拟转换精度的装置和方法通过在将模拟输入信号转换为数字形式之前产生与输入模拟信号组合的抖动信号来实现提高的精度。 然后将组合的输入模拟/抖动信号转换为数字信号。 然后根据要由电路执行的期望功能对数字信号进行处理或延迟。 在数字处理之后，数字值被转换成模拟形式，并且随后从输出信号中去除抖动信号。 此外，用于提高不利用显式抖动信号的模数转换的精度的装置和方法利用线性插值技术来实现伪抖动信号的效果。 类似地，时间复用技术也被用于实现相同的效果。 本发明的原理适用于使用连续的数字采样产生模拟信号的系统。 从这些系统得到的输出信号表现出提高的精度，更低的失真和更高的分辨率。 本发明还可以用于维持原始输出分辨率，同时需要较少的比特来表示数字样本。

公开(公告)号：US5265039A

公开(公告)日：1993-11-23

申请号：US716752

申请日：1991-06-18

Applicant: Raul Curbelo ,  Warren R. Howell

Inventor： Raul Curbelo ,  Warren R. Howell

IPC: H03M1/20

CPC classification number: G01J3/45 ,  H03M1/201

Abstract: A technique for improving the resolution of an A/D converter (30). The input analog signal is sampled to generate an analog level and the analog level is held (20) for an interval. A dither signal (22) is superimposed (23) on the held level to generate a fluctuating voltage. This fluctuating voltage is then sampled (25) a plurality of at least N times, and N sampled values are communicated to the A/D converter (30) so that N digitized values are generated. These digitized values are averaged (32) to provide an output having a digitization error reduced by a factor of up to N.sup.1/2.

Abstract translation: 一种用于提高A / D转换器（30）的分辨率的技术。 输入模拟信号被采样以产生模拟电平，并且模拟电平保持（20）一段间隔。 抖动信号（22）在保持电平上叠加（23）以产生波动电压。 然后对该波动电压进行采样（25）多次至少N次，并且将N个采样值传送到A / D转换器（30），从而生成N个数字化值。 这些数字化值被平均（32），以提供数字化误差降低到N1 / 2的因子的输出。

公开(公告)号：US4647968A

公开(公告)日：1987-03-03

申请号：US677523

申请日：1984-12-03

Applicant: Donald H. Willis

Inventor： Donald H. Willis

IPC: H03M1/12 ,  H03M1/00 ,  H04N7/26 ,  H04N7/04

CPC classification number: H03M1/201 ,  H04N19/90 ,  H03M1/365

Abstract: A narrow bandwidth analog-to-digital conversion (ADC) system is described in the context of the color burst processing and burst phase detecting circuitry of a digital color television receiver. The ADC includes a dither generator which adds a dither signal to either the analog input signal or to the reference signal used by the ADC. This dither signal increases in magnitude by 1/16 of an LSB value at a rate one-quarter of the burst frequency and changes in sign at one-half of the burst frequency. This signal passes through a low-pass filter in the chrominance channel providing an increase in sample resolution by averaging the samples in a chroma band-pass filter and in the phase detecting circuitry.

Abstract translation: 在数字彩色电视接收机的色同步处理和突发相位检测电路的上下文中描述了窄带宽模数转换（ADC）系统。 ADC包括一个抖动发生器，它将抖动信号添加到模拟输入信号或ADC使用的参考信号。 该抖动信号的幅度以突发频率的四分之一的速率在LSB值上增加1/16，并且在突发频率的一半处以符号改变。 该信号通过色度通道中的低通滤波器，通过对色度带通滤波器和相位检测电路中的采样进行平均来提高样本分辨率。

公开(公告)号：US4034367A

公开(公告)日：1977-07-05

申请号：US551283

申请日：1975-02-20

Applicant: Takashi Sugiyama ,  Takashi Tsuda

Inventor： Takashi Sugiyama ,  Takashi Tsuda

IPC: H03M1/00 ,  H03K13/02

CPC classification number: H03M1/201

Abstract: An analog-to-digital converter arranged to accept an analog input signal and to convert it into an output having digital form. The converter is characterized by a reference random noise source which generates random noise signals with uniform amplitude occurrence probability density in a given range, and by an amplitude comparator arranged to repeatedly compare the amplitude of the random noise signal with the amplitude of a signal varying with the analog signal to be converted. The amplitude comparator supplies output pulses in accordance with the comparisons, e.g., whenever the analog signal amplitude is greater than the random noise amplitude, and the number of pulses from the amplitude comparator in a measurement interval then digitally corresponds to the value of the analog signal and may be utilized, as in a display. Resolution of the converter is increased beyond the minimum amplitude increment of the random noise source signal in one embodiment by superposition on either the analog signal or the random noise signal of a triangular wave with an amplitude greater than the minimum amplitude increment of the random noise signal, and in another embodiment by superposition of a second random noise signal.

Abstract translation: 一种模拟 - 数字转换器，被配置为接受模拟输入信号并将其转换成具有数字形式的输出。 转换器的特征在于参考随机噪声源，其产生在给定范围内具有均匀振幅发生概率密度的随机噪声信号，并且通过幅度比较器布置成重复地比较随机噪声信号的振幅与随 要转换的模拟信号。 幅度比较器根据比较提供输出脉冲，例如，每当模拟信号幅度大于随机噪声幅度时，并且在测量间隔中来自幅度比较器的脉冲数然后数字地对应于模拟信号的值 并且可以如在显示器中那样被利用。 在一个实施例中，转换器的分辨率增加到随机噪声源信号的最小幅度增量之外，通过叠加具有大于随机噪声信号的最小振幅增量的三角波的模拟信号或随机噪声信号 ，并且在另一个实施例中通过叠加第二随机噪声信号。

公开(公告)号：KR101672875B1

公开(公告)日：2016-11-07

申请号：KR1020150119136

申请日：2015-08-24

Applicant: 고려대학교 산학협력단

Inventor： 김철우 ,  박세진

IPC: H03M1/12

CPC classification number: H03M1/462 ,  H03M1/0607 ,  H03M1/201 ,  H03M1/468

Abstract: 축차비교형아날로그디지털변환기를제공한다. 본발명의저전력고속축차비교형아날로그디지털변환기는제1 및제2 아날로그신호를입력받아샘플링하는부트스트래핑부; 및상기제1 및제2 아날로그신호를디지털신호로변환하여출력하되, 의도적으로인가된오프셋전압에응답하여그 해상도가증가하는아날로그디지털변환부를포함한다. 이때, 상기아날로그디지털변환부는서로다른용량을갖는다수의기준전압인가커패시터들과, 오프셋전압인가커패시터를포함하는차동형구조의커패시터어레이; 상기차동형구조의커패시터어레이를비동기모드로동작시키기위한지연셀; 상기커패시터어레이에기준전압을인가하는레퍼런스전달스위치부; 상기커패시터어레이의출력전압을비교하는비교기; 및상기비교기의출력신호에응답하여상기레퍼런스전달스위치부의동작을제어하되, 상기비교기의출력이비정상인경우상기오프셋전압인가커패시터로기준전압이인가되도록제어하는순차비교레지스터로직을포함한다.

Abstract translation: 提供了一种连续近似寄存器模数转换器（“SARADC”），其包括：自举单元，其接收和采样模拟信号; 以及将模拟信号转换为数字信号并输出​​数字信号的模数转换单元（“ADCU”）。 ADCU响应于有意注入的失调电压而具有增加的分辨率。 在这种情况下，ADCU包括具有：差分结构的电容阵列（“CA”），每个差分结构包括具有不同电容的参考电压施加电容器和偏移电压注入电容器（“OVIC”）; 以异步模式操作CA的延迟单元; 参考转换开关单元（“RTSU”），将参考电压应用于CA; 比较器，用于比较CA的输出电压; 和连续近似寄存器逻辑（“SARL”）。 SARL根据比较器的输出信号控制RTSU的操作，并执行控制，以便当比较器的输出异常时，将参考电压施加到OVIC。

公开(公告)号：KR101175046B1

公开(公告)日：2012-08-17

申请号：KR1020110066977

申请日：2011-07-06

Applicant: 가부시키가이샤 타니타

Inventor： 나까다마사또

IPC: H03M1/12

CPC classification number: H03M1/201

Abstract: AD 변환장치는진폭이서로다른 n개의시프트신호(n은 1보다큰 자연수)를생성하도록구성된시프트신호생성부; 시프트신호생성부를제어하도록구성된시프트신호제어부; 입력아날로그신호와 n개시프트신호를순차적으로합성하여 n개의제1 신호를생성하도록구성된합성부; n개의제1 신호를 n개의제2 신호로변환하는 AD 변환을실행하도록구성된 AD 변환부; 및 n개의제2 신호의평균을계산하여출력디지털신호를생성하도록구성된신호처리부를포함한다.

公开(公告)号：KR1020000060979A

公开(公告)日：2000-10-16

申请号：KR1019990009684

申请日：1999-03-22

Applicant: 에스케이하이닉스 주식회사

Inventor： 오명규

IPC: H03M1/46

CPC classification number: H03M1/201 ,  H03M2201/625

Abstract: PURPOSE: An analog-to-digital converter is provided to improve resolution by varying a reference voltage compared with an analog signal when converting the analog signal of a high or low voltage into a digital signal. CONSTITUTION: An analog-to-digital converter comprises a comparator(1) which compares an analog input signal and a reference voltage from DAC(3). A successive approximation register(2) stores an output value of the comparator(1). The DAC(3) generates the reference voltage depending on the stored value of the successive approximation register(2). A power supply dividing part(10) divides a power supply voltage into 1/22n voltages(n=1-4), and a comparator(20) compares a voltage from the power supply dividing part(10) with an analog input voltage. A switching part(30) selectively outputs the reference voltage applied to the DAC(3), depending on a comparison result of the comparator(20). A shift output part(40) shifts a final output value of the successive approximation register(2) according to the reference voltage applied to the DAC(3), so as to output an exact value.

Abstract translation: 目的：提供一个模数转换器，用于通过在将高电平或低电压的模拟信号转换为数字信号时与模拟信号相比改变参考电压来提高分辨率。 构成：模数转换器包括比较器（1），比较模拟输入信号和DAC（3）的参考电压。 逐次逼近寄存器（2）存储比较器（1）的输出值。 DAC（3）根据逐次逼近寄存器（2）的存储值产生参考电压。 电源分割部（10）将电源电压分割为1 / 22n电压（n = 1-4），比较器（20）将来自电源分割部（10）的电压与模拟输入电压进行比较。 根据比较器（20）的比较结果，开关部件（30）有选择地输出施加到DAC（3）的基准电压。 移位输出部分（40）根据施加到DAC（3）的参考电压移动逐次逼近寄存器（2）的最终输出值，以输出精确值。