公开(公告)号：US08070932B2

公开(公告)日：2011-12-06

申请号：US12076425

申请日：2008-03-18

Applicant: Shih-Ping Hsu ,  Shang-Wei Chen ,  Suo-Hsia Tang ,  Chao-Wen Shih

Inventor： Shih-Ping Hsu ,  Shang-Wei Chen ,  Suo-Hsia Tang ,  Chao-Wen Shih

IPC: C25D5/02

CPC classification number: H05K1/0266 ,  H05K1/0269 ,  H05K3/107 ,  H05K3/4644 ,  H05K2201/09781 ,  H05K2201/09927 ,  H05K2201/09936

Abstract: A circuit board with identifiable information and a method for fabricating the same are proposed. At least one insulating layer within the circuit board has a non-circuit area free of a circuit layout. A plurality of openings are formed in the non-circuit area of the insulating layer. A patterned circuit layer is formed on the insulating layer. Metal identifiable information is disposed in the openings of the non-circuit area. By this arrangement, a product status of the circuit board can be traced and identified via the metal patterned information.

Abstract translation: 提出了具有可识别信息的电路板及其制造方法。 电路板内的至少一个绝缘层具有不具有电路布局的非电路区域。 在绝缘层的非电路区域中形成多个开口。 在绝缘层上形成图案化的电路层。 金属识别信息设置在非电路区域的开口中。 通过这种布置，电路板的产品状态可以通过金属图案信息进行跟踪和识别。

公开(公告)号：US20110179641A1

公开(公告)日：2011-07-28

申请号：US13056613

申请日：2009-07-31

Applicant: Kate Stone

Inventor： Kate Stone

IPC: H05K3/30 ,  B05D5/12 ,  B32B3/10

CPC classification number: B42D15/022 ,  A63F9/24 ,  A63F2011/0081 ,  B42D3/123 ,  B42D2033/46 ,  B42P2221/00 ,  B44F3/00 ,  H05K1/0266 ,  H05K3/12 ,  H05K2201/09936 ,  H05K2201/10037 ,  H05K2201/10106 ,  Y10T29/4913 ,  Y10T428/24802

Abstract: A printed article (1) comprises a substrate (2) and an image (3) printed on the substrate. The image includes line art (4) comprises conductive ink. The image includes representations of at least two items (61, 62) which overlap such that line art of a first item is joined at least one point (71) to line art of a second item.

Abstract translation: 印刷品（1）包括基板（2）和印刷在基板上的图像（3）。 图像包括线条艺术（4）包括导电油墨。 该图像包括重叠的至少两个项目（61,62）的表示，使得第一项目的线条艺术被连接到第二项目的线条艺的至少一个点（71）。

公开(公告)号：US20090205860A1

公开(公告)日：2009-08-20

申请号：US12372158

申请日：2009-02-17

Applicant: Kazutaka KOBAYASHI

Inventor： Kazutaka KOBAYASHI

IPC: H05K1/16 ,  H05K1/11 ,  H05K3/10

CPC classification number: H05K1/0266 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H05K1/114 ,  H05K3/244 ,  H05K3/4644 ,  H05K2201/09509 ,  H05K2201/09609 ,  H05K2201/09936 ,  Y10T29/49155 ,  H01L2924/00

Abstract: In a wiring substrate in which plural wiring layers and insulating layers are alternately stacked and the adjacent wiring layers are electrically connected through a via hole formed in the insulating layer, plural holes constructing substrate management information recognizable as a character, a symbol, etc. are formed in the outside insulating layer of the insulating layers.

Abstract translation: 在多个布线层和绝缘层交替层叠并且相邻布线层通过形成在绝缘层中的通孔电连接的布线基板中，构成可识别为字符，符号等的基板管理信息的多个孔是 形成在绝缘层的外部绝缘层中。

公开(公告)号：US07498521B2

公开(公告)日：2009-03-03

申请号：US11170823

申请日：2005-06-30

Applicant: Brian S. Forbes ,  William L. Sanderson, IV ,  Daniel J. Ragland ,  Tim Menard

Inventor： Brian S. Forbes ,  William L. Sanderson, IV ,  Daniel J. Ragland ,  Tim Menard

IPC: H05K1/03 ,  H05K3/36

CPC classification number: H05K1/0269 ,  H05K3/4626 ,  H05K3/4688 ,  H05K2201/0108 ,  H05K2201/09936 ,  H05K2201/10113 ,  Y10T29/49126

Abstract: A method and apparatus include providing a printed circuit board (PCB) having at least one light permeable layer, at least one non-light permeable layer having at least one void therethrough that may be vertically aligned with the at least one light permeable layer, and a source of illumination to simultaneously illuminate through the void and the at least one light permeable layer.

Abstract translation: 一种方法和装置包括提供具有至少一个透光层的印刷电路板（PCB），至少一个不透光层，其具有至少一个空隙，其可以与至少一个透光层垂直对准，以及 照明源同时照亮空隙和至少一个透光层。

公开(公告)号：US20090045367A1

公开(公告)日：2009-02-19

申请号：US12223736

申请日：2006-08-04

Applicant: Jin Young Lee ,  Gang Woon Heo ,  Young Min Yun ,  Bong Young Lee

Inventor： Jin Young Lee ,  Gang Woon Heo ,  Young Min Yun ,  Bong Young Lee

IPC: F16K31/02

CPC classification number: F15B13/0857 ,  F15B13/0839 ,  F15B13/085 ,  F15B13/0853 ,  F15B13/0875 ,  F15B13/0889 ,  F15B13/0892 ,  H05K1/0266 ,  H05K1/117 ,  H05K1/181 ,  H05K2201/09936 ,  H05K2201/1003 ,  H05K2201/10446 ,  H05K2203/1572 ,  Y02P70/611 ,  Y10T137/87885

Abstract: A circuit board (205) for a valve block (120) of a solenoid valve manifold is described. Each valve block (120) contains a valve which is actuated by either one single solenoid or by two solenoids. Both sides (210, 220) of the circuit board (210) are provided with a circuit (212, 222). The first surface (210) of the circuit board (205) carries a single type valve circuit (212) for supplying one single solenoid with electrical energy. This first surface (210) can be mark e.g. with an “S”. The second surface (220) of the circuit board (205) carries a double-type valve circuit (222) for supplying two solenoids with electrical power. This second surface (220) can be marked e.g. with a “D”. The circuit board (205) is positioned in the respective valve block (120) with the first surface (210) or the second surface (220) facing upwards depending on whether a single- or a double-solenoid-valve is used in the respective valve block (120).

Abstract translation: 描述了用于电磁阀歧管的阀块（120）的电路板（205）。 每个阀块（120）包含由一个单个螺线管或两个螺线管致动的阀。 电路板（210）的两侧（210,220）设置有电路（212,222）。 电路板（205）的第一表面（210）承载用于向单个螺线管提供电能的单一型阀电路（212）。 该第一表面（210）可以标记为例如。 带有“S”。 电路板（205）的第二表面（220）承载用于向两个螺线管供电的双电源电路（222）。 该第二表面（220）可以被标记为例如。 带有“D”。 电路板（205）位于相应的阀块（120）中，其中第一表面（210）或第二表面（220）面向上，这取决于在相应的方法中是使用单电磁阀还是双电磁阀 阀块（120）。

公开(公告)号：US20080166497A1

公开(公告)日：2008-07-10

申请号：US12076425

申请日：2008-03-18

Applicant: Shih-Ping Hsu ,  Shang-Wei Chen ,  Suo-Hsia Tang ,  Chao-Wen Shih

Inventor： Shih-Ping Hsu ,  Shang-Wei Chen ,  Suo-Hsia Tang ,  Chao-Wen Shih

IPC: B05D5/12

CPC classification number: H05K1/0266 ,  H05K1/0269 ,  H05K3/107 ,  H05K3/4644 ,  H05K2201/09781 ,  H05K2201/09927 ,  H05K2201/09936

Abstract: A circuit board with identifiable information and a method for fabricating the same are proposed. At least one insulating layer within the circuit board has a non-circuit area free of a circuit layout. A plurality of openings are formed in the non-circuit area of the insulating layer. A patterned circuit layer is formed on the insulating layer. Metal identifiable information is disposed in the openings of the non-circuit area. By this arrangement, a product status of the circuit board can be traced and identified via the metal patterned information.

Abstract translation: 提出了具有可识别信息的电路板及其制造方法。 电路板内的至少一个绝缘层具有不具有电路布局的非电路区域。 在绝缘层的非电路区域中形成多个开口。 在绝缘层上形成图案化的电路层。 金属识别信息设置在非电路区域的开口中。 通过这种布置，电路板的产品状态可以通过金属图案信息进行跟踪和识别。

公开(公告)号：US20080155158A1

公开(公告)日：2008-06-26

申请号：US11862199

申请日：2007-09-27

Applicant: HENG YU ,  FENG-LONG HE

Inventor： HENG YU ,  FENG-LONG HE

IPC: G06F13/00

CPC classification number: G06F13/409 ,  G01R31/2818 ,  H05K1/0268 ,  H05K1/117 ,  H05K1/14 ,  H05K2201/09936

Abstract: An exemplary PCI interface card includes a printed circuit board having a plurality of testing points arranged thereon, and a connecting portion configured to engage in a PCI connector of a motherboard. The connecting portion protrudes from the printed circuit board, and has a plurality of golden fingers disposed thereon. Some of the golden fingers configured to respectively connect with contacts of the PCI connector, which are set to connect with a south bridge chip of the motherboard to transmit address and data signals, are respectively electronically connected to the testing points of the printed circuit board.

Abstract translation: 示例性PCI接​​口卡包括其上布置有多个测试点的印刷电路板，以及被配置为接合主板的PCI连接器的连接部分。 连接部从印刷电路板突出，并且在其上设置有多个金指。 被配置为分别与被设置为与主板的南桥芯片连接以传送地址和数据信号的PCI连接器的触点分别连接的一些金手指分别电连接到印刷电路板的测试点。

公开(公告)号：US07381904B1

公开(公告)日：2008-06-03

申请号：US10724299

申请日：2003-11-26

Applicant: Raffi Codilian

Inventor： Raffi Codilian

IPC: H05K1/16

CPC classification number: H05K1/0269 ,  G11B25/043 ,  G11B33/08 ,  G11B33/122 ,  H05K3/303 ,  H05K2201/09918 ,  H05K2201/09936 ,  H05K2201/10727 ,  H05K2203/166 ,  Y02P70/613

Abstract: A printed circuit board on which multiple component-dedicated alignment line indicators including parallel lines may be used to facilitate the evaluation and segregation process during the production of printed circuit board assemblies based on the alignment characteristics of mounted disk drive electrical components with respect to these parallel lines. Each electrical component defines a perimeter with edges defining a first and second lateral distances and corners defining a diagonal distance. The alignment line indicators include first and second inner line segments spaced apart a first inner spacing at least the first lateral distance and less than the diagonal distance. The alignment line indicators include third and fourth inner line segments spaced apart at least the second lateral distance and less than the diagonal distance. The alignment line indicators include first and second outer line segments spaced apart more than the first inner spacing and less than the diagonal distance.

Abstract translation: 可以使用包括平行线的多个组件专用对准线指示器的印刷电路板，以便在印刷电路板组件生产期间基于相对于这些平行的安装的盘驱动器电气部件的对准特性来评估和分离过程 线条。 每个电气部件限定具有限定第一和第二横向距离的边缘以及限定对角线距离的边缘。 对准线指示器包括第一和第二内部线段，其间隔开至少第一横向距离并小于对角距离的第一内部间隔。 对准线指示器包括至少间隔第二横向距离并小于对角线距离的第三和第四内线段。 对准线指示器包括第一和第二外线段，其间隔开多于第一内部间隔并小于对角距离。

公开(公告)号：US07279216B2

公开(公告)日：2007-10-09

申请号：US11255967

申请日：2005-10-24

Applicant: Chih-Ching Chen ,  Yi-Jing Leu

Inventor： Chih-Ching Chen ,  Yi-Jing Leu

IPC: B32B27/14 ,  B32B3/00

CPC classification number: B41J2/17559 ,  B41J2/1753 ,  B41J2/17546 ,  H05K1/0266 ,  H05K1/0269 ,  H05K1/0393 ,  H05K3/28 ,  H05K2201/09936 ,  H05K2203/0514 ,  H05K2203/161 ,  Y10S29/016 ,  Y10S428/901 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/31507 ,  Y10T428/31721 ,  Y10T428/31725 ,  Y10T428/31786

Abstract: The invention discloses an identifiable flexible printed circuit board (PCB) and a method of fabricating the same. The identifiable flexible PCB includes a flexible substrate, a conductive layer, and a printing ink layer. First, the conductive layer is formed over a surface of the flexible substrate. Second, the printing ink layer is formed on the surface of the flexible substrate by coating, exposing, and developing to uncover parts of the conductive layer. Also, at least one identifiable area is formed on the printing ink layer and one can easily and correctly identify the cartridge with the flexible PCB.

Abstract translation: 本发明公开了一种可识别的柔性印刷电路板（PCB）及其制造方法。 可识别的柔性PCB包括柔性基板，导电层和印刷油墨层。 首先，在柔性基板的表面上形成导电层。 其次，通过涂布，曝光和显影以形成导电层的部分，在柔性基板的表面上形成印刷油墨层。 此外，在印刷油墨层上形成至少一个可识别的区域，并且可以容易且正确地识别带柔性PCB的盒。

公开(公告)号：US07108172B2

公开(公告)日：2006-09-19

申请号：US10865103

申请日：2004-06-10

Applicant: Walter Parsadayan ,  Hagop Sakadjian

Inventor： Walter Parsadayan ,  Hagop Sakadjian

IPC: G06F17/00

CPC classification number: G06K19/0775 ,  H05K1/0266 ,  H05K1/18 ,  H05K2201/055 ,  H05K2201/09936 ,  H05K2201/10575

Abstract: Information regarding electrical components and their use is provided with a foldable information sheet having instructions thereon. The sheet has apertures which fit over the electrical components and information is printed on the sheet in proximity to the electrical component or components to which it applies. A portion of the information sheet may be adhered to a planar surface on which the components are mounted and non-adhered portions of the information sheet may be folded over the components.

Abstract translation: 关于电气部件及其使用的信息被提供有具有指令的可折叠信息表。 纸张具有适合于电气部件的孔，并且信息被印刷在靠近其所应用的电气部件或组件的片材上。 信息表的一部分可以附着在其上安装有部件的平面上，并且信息表的非粘附部分可以在部件上折叠。