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公开(公告)号：US09006063B2
公开(公告)日：2015-04-14
申请号：US13931637
申请日：2013-06-28
Inventor： Yean Ching Yong , Stefania Fortuna
IPC: H01L21/8242 , H01L21/336 , H01L21/265 , H01L29/423 , H01L29/66 , H01L29/78
CPC classification number: H01L21/265 , H01L21/26513 , H01L29/1095 , H01L29/66734 , H01L29/7813 , H01L29/7827
Abstract: A method for forming a trench MOSFET includes doping a body region of the trench MOSFET in multiple ion implantation steps each having different ion implantation energy. The method further comprises etching the trench to a depth of about 1.7 μm.
Abstract translation: 一种形成沟槽MOSFET的方法包括：在具有不同离子注入能量的多个离子注入步骤中掺杂沟槽MOSFET的体区。 该方法还包括将沟槽蚀刻至约1.7μm的深度。
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公开(公告)号：US20150015317A1
公开(公告)日：2015-01-15
申请号：US13940713
申请日：2013-07-12
Applicant: STMicroelectronics Asia Pacific Pte. Ltd.
Inventor： Beng-Heng Goh
IPC: H03K3/037
CPC classification number: H03K3/037 , G01R31/318541
Abstract: Configurable flip-flop cells for use in scan chain configurations include one or more multiplexers, a flip-flop, and one or more logic gates. The logic gates are configurable, through modification of different metallization or semiconductor layers, to operate as spare gates or to disable flip-flop cell outputs based selection signal switching between scan shift and capture mode. When disabling flip-flop cell outputs, the logic gates are configured to receive both a test signal and a data input signal and select one of the two to pass to the flip-flop based on the selection signal. When used as spare gates, the logic gates receive external inputs and provide spare gate outputs to circuitry on an integrated circuit that is external to the flip-flop cells.
Abstract translation: 用于扫描链配置的可配置触发器单元包括一个或多个多路复用器，触发器和一个或多个逻辑门。 逻辑门可通过不同金属化或半导体层的修改来配置，作为备用栅极运行，或禁止基于触发器单元输出的选择信号在扫描移位和捕捉模式之间切换。 当禁止触发器单元输出时，逻辑门被配置为接收测试信号和数据输入信号，并且基于选择信号选择两者之一传递到触发器。 当用作备用栅极时，逻辑门接收外部输入，并为触发器单元外部的集成电路上的电路提供备用栅极输出。
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公开(公告)号：US08928381B1
公开(公告)日：2015-01-06
申请号：US13940713
申请日：2013-07-12
Applicant: STMicroelectronics Asia Pacific Pte. Ltd.
Inventor： Beng-Heng Goh
CPC classification number: H03K3/037 , G01R31/318541
Abstract: Configurable flip-flop cells for use in scan chain configurations include one or more multiplexers, a flip-flop, and one or more logic gates. The logic gates are configurable, through modification of different metallization or semiconductor layers, to operate as spare gates or to disable flip-flop cell outputs based selection signal switching between scan shift and capture mode. When disabling flip-flop cell outputs, the logic gates are configured to receive both a test signal and a data input signal and select one of the two to pass to the flip-flop based on the selection signal. When used as spare gates, the logic gates receive external inputs and provide spare gate outputs to circuitry on an integrated circuit that is external to the flip-flop cells.
Abstract translation: 用于扫描链配置的可配置触发器单元包括一个或多个多路复用器，触发器和一个或多个逻辑门。 逻辑门可通过不同金属化或半导体层的修改来配置，作为备用栅极运行，或禁止基于触发器单元输出的选择信号在扫描移位和捕捉模式之间切换。 当禁止触发器单元输出时，逻辑门被配置为接收测试信号和数据输入信号，并且基于选择信号选择两者之一传递到触发器。 当用作备用栅极时，逻辑门接收外部输入，并为触发器单元外部的集成电路上的电路提供备用栅极输出。
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164.发明授权Converting samples of a signal at a sample rate into samples of another signal at another sample rate 有权将采样速率的信号样本转换为另一个采样率的另一个信号的样本公开(公告)号：US08874175B2
公开(公告)日：2014-10-28
申请号：US13672326
申请日：2012-11-08
Applicant: STMicroelectronics Asia Pacific Pte Ltd.
Inventor： Karthik Muralidhar , Sapna George , Saurav Sahu , Frank Teo
Abstract: In an embodiment, an apparatus includes a determiner, converter, adapter, and modifier. The determiner is configured to generate a representation of a difference between a first frequency at which a first signal is sampled and a second frequency at which a second signal is sampled, and the converter is configured to generate a second sample of the first signal at a second time in response to the representation and a first sample of the first signal at a first time. The adapter is configured to generate a sample of a modifier signal in response to the second sample of the first signal, and the modifier is configured to generate a modified sample of the second signal in response to a sample of the second signal and the sample of the modifier signal. For example, such an apparatus may be able to reduce the magnitude of an echo signal in a system having an audio pickup (e.g., a microphone) near an audio output (e.g., a speaker).
Abstract translation: 在一个实施例中，装置包括确定器，转换器，适配器和修改器。 确定器被配置为产生第一信号被采样的第一频率与第二信号被采样的第二频率之间的差异的表示，并且转换器被配置为在第一频率处产生第一信号的第二采样 第二次响应于第一次的表示和第一个信号的第一个样本。 适配器被配置为响应于第一信号的第二样本产生修改器信号的样本，并且修改器被配置为响应于第二信号的样本和第二信号的样本而生成第二信号的修改样本 修改信号。 例如，这样的装置可能能够减小在音频输出（例如扬声器）附近具有音频拾取器（例如，麦克风）的系统中的回波信号的幅度。
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165.发明申请公开(公告)号：US20140312919A1
公开(公告)日：2014-10-23
申请号：US14322244
申请日：2014-07-02
Inventor： Kien Beng Tan , Ernesto Lasalandra , Tommaso Ungaretti , Yannick Guedon , Dianbo Guo , Paolo Angelini , Giovanni Carlo Tripoli
CPC classification number: G01R27/2605 , G06F3/0416 , G06F3/044 , G06F2203/04104
Abstract: Capacitance sensing circuits and methods are provided. A dual mode capacitance sensing circuit includes a capacitance-to-voltage converter having an amplifier and an integration capacitance coupled between an output and an inverting input of the amplifier, and a switching circuit responsive to mutual mode control signals for a controlling signal supplied from a capacitive touch matrix to the capacitive to voltage converter in a mutual capacitance sensing mode and responsive to self mode control signals for controlling signals supplied from the capacitive touch matrix to the capacitance-to-voltage converter in a self capacitance sensing mode, wherein the capacitance sensing circuit is configurable for operation in the mutual capacitance sensing mode or the self capacitance sensing mode.
Abstract translation: 提供电容感测电路和方法。 双模电容感测电路包括具有放大器和耦合在放大器的输出和反相输入端之间的积分电容的电容 - 电压转换器，以及响应于从模拟信号提供的控制信号的相互模式控制信号的开关电路 电容式触摸矩阵到互电容感测模式中的电容到电压转换器，并且响应于用于在自电容感测模式中控制从电容式触摸矩阵提供给电容 - 电压转换器的信号的自模式控制信号，其中电容感测 电路可配置为在互电容感测模式或自身电容感测模式下工作。
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Patent Agency Ranking
公开(公告)号：US20140306921A1
公开(公告)日：2014-10-16
申请号：US13862562
申请日：2013-04-15
Applicant: STMICROELECTRONICS ASIA PACIFIC PTE. LTD.
Inventor： Kusuma Adi Ningrat
CPC classification number: G06F3/0412 , G06F3/044 , G06F2203/04112
Abstract: An in-cell touchscreen panel includes columns of transmit electrodes and rows of sensing electrodes, wherein each row of sensing electrodes comprises a first subset of sensing electrodes coupled to control circuitry via a first subset of receiving traces and a second subset of sensing electrodes coupled to the control circuitry via a second subset of receiving traces. To enable multi-touch functionality, the in-cell touchscreen panel operates in a scanning mode where capacitance is measured at each node where the sensing electrodes intersect the transmit electrodes. During the scanning mode, the control circuitry senses the first and second subsets of receiving traces while applying drive signals to pairs of transmit electrodes. After a drive signal has been applied to each of the transmit electrodes, each of the nodes are measured to detect a capacitance. This capacitance is indicative of a user touch on the in-cell touchscreen panel.
Abstract translation: 单元内触摸屏面板包括发射电极列和感测电极列，其中每行感测电极包括经由接收迹线的第一子集耦合到控制电路的感测电极的第一子集，以及耦合到 控制电路经由接收轨迹的第二子集。 为了实现多点触摸功能，单元内触摸屏面板以扫描模式工作，其中在感测电极与发射电极相交的每个节点处测量电容。 在扫描模式期间，控制电路在将驱动信号施加到发射电极对时感测接收迹线的第一和第二子集。 在将驱动信号施加到每个发射电极之后，测量每个节点以检测电容。 该电容表示用户在单元内触摸屏面板上的触摸。
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167.发明申请CONVERTING SAMPLES OF A SIGNAL AT A SAMPLE RATE INTO SAMPLES OF ANOTHER SIGNAL AT ANOTHER SAMPLE RATE 有权将样本中的信号转换为另一个信号的样本在另一个采样率公开(公告)号：US20140128004A1
公开(公告)日：2014-05-08
申请号：US13672326
申请日：2012-11-08
Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD.
Inventor： Karthik MURALIDHAR , Sapna GEORGE , Saurav SAHU , Frank TEO
IPC: H04B17/00
Abstract: In an embodiment, an apparatus includes a determiner, converter, adapter, and modifier. The determiner is configured to generate a representation of a difference between a first frequency at which a first signal is sampled and a second frequency at which a second signal is sampled, and the converter is configured to generate a second sample of the first signal at a second time in response to the representation and a first sample of the first signal at a first time. The adapter is configured to generate a sample of a modifier signal in response to the second sample of the first signal, and the modifier is configured to generate a modified sample of the second signal in response to a sample of the second signal and the sample of the modifier signal. For example, such an apparatus may be able to reduce the magnitude of an echo signal in a system having an audio pickup (e.g., a microphone) near an audio output (e.g., a speaker).
Abstract translation: 在一个实施例中，装置包括确定器，转换器，适配器和修改器。 确定器被配置为产生第一信号被采样的第一频率与第二信号被采样的第二频率之间的差异的表示，并且转换器被配置为在第一频率处产生第一信号的第二采样 第二次响应于第一次的表示和第一个信号的第一个样本。 适配器被配置为响应于第一信号的第二样本产生修改器信号的样本，并且修改器被配置为响应于第二信号的样本和第二信号的样本而生成第二信号的修改样本 修改信号。 例如，这样的装置可能能够减小在音频输出（例如扬声器）附近具有音频拾取器（例如，麦克风）的系统中的回波信号的幅度。
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公开(公告)号：US20140110565A1
公开(公告)日：2014-04-24
申请号：US13656912
申请日：2012-10-22
Applicant: STMICROELECTRONICS ASIA PACIFIC PTE. LTD.
Inventor： Jerome Teysseyre , Yonggang Jin
IPC: H01L27/146 , H01L31/18
CPC classification number: H01L27/14625 , H01L24/97 , H01L27/14618 , H01L2924/12042 , H01L2924/00
Abstract: An image sensor device may include a bottom interconnect layer, an image sensing IC above the bottom interconnect layer and coupled thereto, and an adhesive material on the image sensing IC. The image sensor device may include an IR filter layer above the lens layer, and an encapsulation material on the bottom interconnect layer and surrounding the image sensing IC, the lens layer, and the IR filter layer. The image sensor device may include a top contact layer above the encapsulation material and including a dielectric layer, and a contact thereon, the dielectric layer being flush with adjacent portions of the IR filter layer.
Abstract translation: 图像传感器装置可以包括底部互连层，在底部互连层上方并耦合到其上的图像感测IC以及图像感测IC上的粘合剂材料。 图像传感器装置可以包括在透镜层上方的IR滤光层，以及在底部互连层上的包围材料，并围绕图像感测IC，透镜层和IR滤光层。 图像传感器装置可以包括在封装材料上方的顶部接触层，并且包括介电层及其上的接触件，该介电层与IR滤光器层的相邻部分齐平。
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公开(公告)号：US20140105717A1
公开(公告)日：2014-04-17
申请号：US13651562
申请日：2012-10-15
Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD
Inventor： Hk LOOI , Cheng-hai CHEH , HaiKin TOH
IPC: B25J15/06
CPC classification number: B25J15/0616 , H05K13/0404 , H05K13/0408 , H05K13/0409 , Y10S901/40 , Y10T29/53178 , Y10T29/53191
Abstract: A PNP apparatus may include a robotic arm, and a PNP tool head carried by the robotic arm. The PNP tool head may include a body configured to apply bonding pressure to a first area of an electronic device, and a pick-up tip movable between an extended position and a retracted position relative to the body as the pick-up tip rests against a second area of the electronic device. The pick-up tip may define a vacuum passageway therethrough to couple a vacuum source to the second area of the electronic device.
Abstract translation: PNP装置可以包括机器人臂和由机器人手臂承载的PNP工具头。 PNP工具头可以包括构造成将粘合压力施加到电子设备的第一区域的主体，以及拾取尖端，当拾取尖端抵靠在主体上时，拾取尖端可相对于主体在延伸位置和缩回位置之间移动 电子设备的第二区域。 拾取尖端可以限定穿过其中的真空通道以将真空源耦合到电子设备的第二区域。
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公开(公告)号：US12074663B2
公开(公告)日：2024-08-27
申请号：US17967449
申请日：2022-10-17
Applicant: STMicroelectronics Asia Pacific Pte Ltd.
Inventor： Yannick Guedon
CPC classification number: H04B5/72 , H02J7/04 , H02J50/12 , H02J50/80 , H04B5/79 , H04L25/4904 , H04L27/06
Abstract: A power transmitter includes: a first switch coupled between a first node and a reference voltage node; a second switch configured to be coupled between a power supply and the first node; a coil and a capacitor coupled in series between the first node and the reference voltage node; a first sample-and-hold (S&H) circuit having an input coupled to the first node; and a timing control circuit configured to generate a first control signal, a second control signal, and a third control signal that have a same frequency, where the first control signal is configured to turn ON and OFF the first switch alternately, the second control signal is configured to turn ON and OFF the second switch alternately, and where the third control signal determines a sampling time of the first S&H circuit and has a first pre-determined delay from a first edge of the first control signal.
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