公开(公告)号：WO2013163867A1

公开(公告)日：2013-11-07

申请号：PCT/CN2012/083542

申请日：2012-10-26

Applicant: 华为技术有限公司

Inventor： 王保启 ,  张国栋 ,  刘访明

IPC: H05K7/02 ,  H01R12/00

CPC classification number: H01R12/737 ,  H04Q1/15 ,  H05K1/14 ,  H05K3/366 ,  H05K5/0065 ,  H05K7/1445 ,  H05K2201/044 ,  H05K2201/10189

Abstract: 一种垂直正交互连系统及通信设备，所述垂直正交互连系统包括第一单板组、与所述第一单板组正交的第二单板组以及设于所述第一单板组与第二单板组之间的中置背板（32）；所述第一单板组包括多块相互平行的第一单板（11），所述第二单板组包括多块相互平行的第二单板（12）；多个弯公连接器（1）设于所述第一单板（11），多个弯母连接器（2）设于所述第二单板（12），所述弯公连接器（1）与弯母连接器（2）一一对应直接配合连接。本发明使弯公连接器与弯母连接器直接配合连接，升级本垂直正交互连系统时，更换固设有弯公连接器和弯母连接器的单板即可，极为简便且缩短了信号链路。本垂直正交互连系统可用于各种通信设备，使之升级方便且提升了信号质量，散热佳，节省材料成本。

公开(公告)号：WO2012159933A3

公开(公告)日：2013-02-07

申请号：PCT/EP2012058992

申请日：2012-05-15

Applicant: ALCATEL LUCENT ,  HOOGHE KOEN

Inventor： HOOGHE KOEN

IPC: H05K1/14 ,  G06F13/40 ,  H05K1/02 ,  H05K7/14

CPC classification number: H05K1/14 ,  H01P5/103 ,  H05K1/0243 ,  H05K1/141 ,  H05K7/1459 ,  H05K2201/0311 ,  H05K2201/044 ,  H05K2201/10189

Abstract: A serial link interconnection arrangement for interconnecting a first printed circuit board (BoardA) with a second printed circuit board (BoardB), both boards being inserted in a backplane of a telecommunication system. The arrangement comprises a waveguide embedded in the backplane. A first end (WavA) of the waveguide is coupled to the first board (BoardA) via a first connection system (ConA), whilst the second end (WavB) of the waveguide is coupled to the second board (BoardB) via a second connection system (ConB). Each of the connection systems (ConA; ConB) comprises a transceiver (IntA; IntB) adapted to convert a parallel signal received from the printed circuit board (BoardA; BoardB) into a serial stream transmitted to an end (WavA; WavB) of the waveguide via an antenna (AntA; AntB), and vice-versa.

Abstract translation: 一种用于将第一印刷电路板（BoardA）与第二印刷电路板（BoardB）互连的串行链路互连装置，两个板插入电信系统的背板中。 该布置包括嵌入背板中的波导。 波导的第一端（WavA）通过第一连接系统（ConA）耦合到第一板（BoardA），而波导的第二端（WavB）通过第二连接耦合到第二板（BoardB） 系统（ConB）。 每个连接系统（ConA; ConB）包括适于将从印刷电路板（BoardA; BoardB）接收的并行信号转换成传输到端部（WavA; WavB）的串行流的收发器（IntA; IntB） 波导通过天线（AntA; AntB），反之亦然。

公开(公告)号：WO2008014068A3

公开(公告)日：2008-11-06

申请号：PCT/US2007071832

申请日：2007-06-21

Applicant: LIQUID COMPUTING CORP ,  AO ERIC RONG

Inventor： AO ERIC RONG

IPC: H05K7/00

CPC classification number: H05K3/429 ,  H05K1/115 ,  H05K2201/044 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/09645

Abstract: A multilayer midplane board has a front side and a back side and includes a first partially plated through-hole; a second partially plated through-hole spaced away from the first partially plated through-hole, and a first conductive signal track that electrically couples a selected plated section of the first partially plated through-hole directly adjacent the front side to a selected plated section of the second partially plated through-hole adjacent the back side.

Abstract translation: 多层中面板具有前侧和后侧，并且包括第一部分镀覆的通孔; 与第一部分电镀的通孔间隔开的第二部分电镀的通孔，以及第一导电信号轨道，其将直接邻近正面的第一部分电镀通孔的选定电镀部分电耦合到 第二部分电镀通孔邻近背面。

公开(公告)号：WO2008050181A1

公开(公告)日：2008-05-02

申请号：PCT/IB2006/054687

申请日：2006-10-23

Applicant: FCI ,  DE GEEST, Jan ,  SERCU, Stefaan Hendrik Josef

Inventor： DE GEEST, Jan ,  SERCU, Stefaan Hendrik Josef

IPC: H05K1/02

CPC classification number: H05K1/0251 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09727

Abstract: Interconnection system, comprising at least one printed circuit board (PCB) with signal traces (14, 15) and grounds (13), and a connector (4) having a plurality of signal (6) and ground (7) terminals connected to signal traces (14, 15) and grounds (13) of the PCB, the signal traces and signal terminals of the connector connected to the signal traces providing signal paths each extending between a first end and a second end having respectively first and second characteristic impedance. The system has at least a part of a signal path comprising an impedance transition section (17) having an impedance gradually changing from a first value substantially corresponding to the first characteristic impedance to a second value substantially corresponding to the second characteristic impedance.

Abstract translation: 互连系统，包括具有信号迹线（14,15）和接地（13）的至少一个印刷电路板（PCB）和具有连接到信号的多个信号（6）和接地（7）端子的连接器（4） 连接到PCB的迹线（14,15）和接地（13），连接到信号迹线的连接器的信号迹线和信号端子提供各自在具有第一和第二特征阻抗的第一端和第二端之间延伸的信号路径。 系统具有信号路径的至少一部分，其包括具有从基本上对应于第一特征阻抗的第一值逐渐变化到基本上对应于第二特征阻抗的第二值的阻抗的阻抗转变部分（17）。

公开(公告)号：WO2007110053A3

公开(公告)日：2007-11-29

申请号：PCT/DE2007000526

申请日：2007-03-21

Applicant: ADVA AG ,  ASCH STEFAN ,  STEINER FALK ,  GROESCHNER UWE

Inventor： ASCH STEFAN ,  STEINER FALK ,  GROESCHNER UWE

IPC: H05K7/14

CPC classification number: H05K7/1439 ,  H05K1/14 ,  H05K1/144 ,  H05K2201/044 ,  H05K2201/045 ,  H05K2201/10409

Abstract: The invention relates to a backplane for an electronic mounting rack having a basic backplane (1) with a plurality of contact strips, wherein a clearance, into which at least one additional backplane (3) can be inserted, is provided on the basic backplane (1).

Abstract translation: 本发明涉及一种底板，其包括一基座底板（1）具有多个接触片，其设置在基座底板（1），一个自由空间，其中，至少一个额外的背板（3）可以被插入一电子框。

公开(公告)号：WO2006071893A2

公开(公告)日：2006-07-06

申请号：PCT/US2005047141

申请日：2005-12-23

Applicant: AMPHENOL CORP ,  COHEN THOMAS S ,  GAILUS MARK W ,  DUNHAM JOHN R

Inventor： COHEN THOMAS S ,  GAILUS MARK W ,  DUNHAM JOHN R

IPC: H01R12/00 ,  H01R13/658

CPC classification number: H01R12/716 ,  H01R12/585 ,  H01R12/724 ,  H01R12/727 ,  H01R13/514 ,  H01R13/6474 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/14 ,  H05K7/1445 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: A differential connector has a plurality of rows. Each row includes a plurality of signal conductors provided as differential pairs. Each signal conductor has a first contact end connectable to a printed circuit board, a second contact end, and an intermediate portion having a first width. For each differential pair, one first contact end lies along a first line parallel to the plurality of rows and the other first contact end lies along a second line parallel to and spaced from the first line. The differential connector further includes a plurality of ground conductors, with each ground conductor corresponding to a differential pair. Each ground conductor has a first contact end connectable to the printed circuit board, a second contact end, and an intermediate portion having a second width that is at least twice the first width.

Abstract translation: 差分连接器具有多行。 每行包括多个作为差分对提供的信号导体。 每个信号导体具有可连接到印刷电路板的第一接触端，第二接触端和具有第一宽度的中间部分。 对于每个差分对，一个第一接触端沿着平行于多个行的第一线并且另一个第一接触端沿着与第一线平行并与其隔开的第二线。 差分连接器还包括多个接地导体，每个接地导体对应于差分对。 每个接地导体具有可连接到印刷电路板的第一接触端，第二接触端和具有至少两倍于第一宽度的第二宽度的中间部分。

公开(公告)号：WO2005081595A3

公开(公告)日：2005-12-15

申请号：PCT/US2005004468

申请日：2005-02-14

Applicant: MOLEX INC

Inventor： REGNIER KENT E ,  BRUNKER DAVID L ,  OGBUOKIRI MARTIN U

IPC: H01L23/64 ,  H01L23/66 ,  H01R12/16 ,  H01R13/658 ,  H05K1/02 ,  H05K1/11 ,  H05K3/42 ,  H01R24/00

CPC classification number: H05K1/0245 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09609 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10189 ,  H01L2924/00

Abstract: A circuit board (200, 300, 400) design is disclosed that is useful in high speed differential signal applications uses either a via arrangement or a circuit trace exit structure. In the via arrangement, sets of differential signal pair vias (301, 303, 401, 402) and an associated ground (302) are arranged adjacent to each other in a repeating pattern. The differential signal vias (301, 303, 591) of each pair are spaced closer to their associated ground via (302a, 593a) than the spacing between the adjacent differential signal pair associated ground (302b, 593b) so that differential signal vias exhibit a preference for electrically coupling to their associated ground vias. The circuit trace exit structure involves the exit portions of the circuit traces (420, 550) of the differential signal vias (401, 402, 591) to follow a path where the traces then meet with and join to the transmission line portions (552) of the conductive traces.

Abstract translation: 公开了一种在高速差分信号应用中使用通路布置或电路走线出口结构的电路板（200,300,400）设计。 在通孔布置中，差分信号对通孔（301,303,401,402）和相关联的接地（302）的组以重复图案彼此相邻布置。 每对的差分信号通孔（301,303,591）比相邻的差分信号对相关联的接地（302b，593b）之间的间隔更靠近其相关联的接地（302a，593a），使得差分信号通孔显示出 优选电耦合到其相关的接地通孔。 电路走线出口结构涉及差分信号通孔（401,402,591）的电路迹线（420,550）的出口部分，以跟随走线然后与路线相交并连接到传输线部分（552）的路径， 的导电迹线。

公开(公告)号：WO2005081595A2

公开(公告)日：2005-09-01

申请号：PCT/US2005/004468

申请日：2005-02-14

Applicant: MOLEX INCORPORATED

Inventor： REGNIER, Kent, E. ,  BRUNKER, David, L. ,  OGBUOKIRI, Martin, U.

IPC: H05K1/00

CPC classification number: H05K1/0245 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09609 ,  H05K2201/09636 ,  H05K2201/09718 ,  H05K2201/10189 ,  H01L2924/00

Abstract: A circuit board design is disclosed that is useful in high speed differential signal applications uses either a via arrangement or a circuit trace exit structure. In the via arrangement, sets of differential signal pair vias and an associated ground are arranged adjacent to each other in a repeating pattern. The differential signal vias of each pair are spaced closer to their associated ground via than the spacing between the adjacent differential signal pair associated ground so that differential signal vias exhibit a preference for electrically coupling to their associated ground vias. The circuit trace exit structure involves the exit portions of the circuit traces of the differential signal vias to follow a path where the traces then meet with and join to the transmission line portions of the conductive traces.

Abstract translation: 公开了一种在高速差分信号应用中使用电路布置或电路走线出口结构的电路板设计。 在通孔布置中，差分信号对通孔和相关接地的组以重复图案彼此相邻布置。 每对的差分信号通孔比相邻的差分信号对相关联的接地之间的间隔更靠近其相关联的接地间隔，使得差分信号通孔表现出对它们相关的接地通孔的电耦合的偏好。 电路走线出口结构涉及差分信号通孔的电路迹线的出口部分，以跟随路径，其中迹线然后与导电迹线的传输线部分相接合并连接到导体迹线的传输线部分。

公开(公告)号：WO2004012488A1

公开(公告)日：2004-02-05

申请号：PCT/JP2002/007579

申请日：2002-07-25

Applicant: 富士通株式会社 ,  森田 義裕

Inventor： 森田 義裕

IPC: H05K3/46

CPC classification number: H05K1/028 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01R12/714 ,  H05K1/147 ,  H05K3/103 ,  H05K3/4691 ,  H05K2201/0394 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2201/10287 ,  Y10T29/49169 ,  Y10T29/49194 ,  H01L2224/0401

Abstract: A novel and effective circuit board of little transmission loss and its manufacturing method. A multiwire board (100) characterized by having first and second boards (110, 130) and wires (120) which electrically connect the first and second boards (110, 130) and are exposed outside. The first and second board of this multiwire board can be bent at the wires at an arbitrary angle. Wires the surfaces of which are smoother than that of the wiring in a flexible portion of a rigid flexible board are used and therefore undergoes no skin effect. Since a circle has a cross sectional area larger than a rectangle, this multiwire board attains high-speed transmission.

Abstract translation: 一种新颖有效的传输损耗电路板及其制造方法。 一种多线板（100），其特征在于具有电连接第一和第二板（110,130）并暴露在外部的第一和第二板（110,130）和导线（120）。 该多线板的第一和第二板可以以任意角度在导线处弯曲。 在刚性柔性板的柔性部分中使用比其布线更平滑的导线，因此不会发生皮肤效应。 由于圆的截面积大于矩形，所以该多线板实现高速传输。

公开(公告)号：WO2003067906A2

公开(公告)日：2003-08-14

申请号：PCT/US2002/027999

申请日：2002-09-03

Applicant: FORCE10 NETWORKS, INC.

Inventor： GOERGEN, Joel, R.

IPC: H04Q1/10

CPC classification number: H05K1/0245 ,  H04Q1/03 ,  H04Q1/10 ,  H04Q1/155 ,  H04Q2201/12 ,  H05K3/4641 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09354 ,  H05K2201/09636

Abstract: A high-speed, high-power modular router is disclosed. As opposed to conventional designs using optical backplane signaling and/or bus bars for power distribution, the disclosed embodiments combine high-power, low-noise power distribution with high-speed signal routing in a common backplane. Disclosed backplane features allow backplane signaling at 2.5 Gbps or greater on electrical differential pairs distributed on multiple high-speed signaling layers. Relatively thick power distribution layers are embedded within the backplane, shielded from the high-speed signaling layers by digital ground layers and other shielding features. A router using such a backplane provides a level of performance and economy that is believed to be unattainable by the prior art.

Abstract translation: 公开了一种高速，高功率模块化路由器。 与使用光学背板信号传输和/或母线进行配电的常规设计相反，所公开的实施例将高功率，低噪声功率分配与高速信号路由结合在公共背板中。 公开的背板功能允许在分布在多个高速信令层上的电气差分对上以2.5 Gbps或更高的背板信号传输。 相对较厚的配电层嵌入在背板内，通过数字接地层和其他屏蔽功能与高速信号层隔离。 使用这种背板的路由器提供了现有技术无法达到的性能和经济水平。