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    HARDWARE SECURE MODULE, RELATED PROCESSING SYSTEM, INTEGRATED CIRCUIT, DEVICE AND METHOD
    171.
    发明公开
    HARDWARE SECURE MODULE, RELATED PROCESSING SYSTEM, INTEGRATED CIRCUIT, DEVICE AND METHOD 审中-公开

    公开(公告)号：EP3425552A1

    公开(公告)日：2019-01-09

    申请号：EP18178541.1

    申请日：2018-06-19

    Applicant: STMicroelectronics Application GmbH ,  STMicroelectronics S.r.l.

    Inventor： COLOMBO, Roberto ,  BERTONI, Guido Marco ,  ORLANDO, William ,  VITTIMANI, Roberta

    IPC: G06F21/72 ,  G06F21/60 ,  G06F21/76

    Abstract: A hardware secure module (HSMa) is described. The hardware secure module (HSMa) comprises a processing unit (106b) and a cryptographic coprocessor (106c). The cryptographic coprocessor (106c) comprises a key storage memory (1064) for storing at least one cryptographic key (MK, CK), a first interface (1068) configured to receive source data (SD) to be processed, a hardware crypto engine (1066) configured to process the source data (SD) as a function of at least one cryptographic key (MK, CK) stored in the key storage memory (1064), a second interface (1060) configured to receive a first cryptographic key (CK) from the processing unit (106b), and a hardware key management circuit (1074) configured to store the first cryptographic key (CK) in the key storage memory (1064).
    In particular, the cryptographic coprocessor (106c) comprises a third interface (1070) configured to receive a second cryptographic key (MK), wherein the hardware key management circuit (1074) is configured to store the second cryptographic key (MK) in the key storage memory (1064). The hardware secure element (HSMa) comprises a non-volatile memory (110) adapted to store the second cryptographic key (MK), and a hardware configuration module (106d) configured to read the second cryptographic key (MK) from the non-volatile memory (110) and send the second cryptographic key (MK) to the second interface (1060).

    PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD
    173.
    发明公开
    PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD 审中-公开

    公开(公告)号：EP3413195A1

    公开(公告)日：2018-12-12

    申请号：EP18173959.0

    申请日：2018-05-24

    Applicant: STMicroelectronics Application GmbH

    Inventor： COLOMBO, Roberto

    IPC: G06F9/445

    Abstract: A processing system is described. The processing system comprises a processing unit (102) and at least one configuration data client (112), each configuration data client (112) comprising a register, wherein each configuration data client (112) is configured to receive configuration data (CD) and store the configuration data (CD) received in the respective register. At least one hardware block is configured to change operation as a function of the configuration data (CD) stored in the registers of the at least one configuration data client (112). Specifically, a non-volatile memory (104) comprises the configuration data (CD), and a hardware configuration module (108) is configured to read the configuration data (CD) from the non-volatile memory (104) and transmit the configuration data (CD) to the at least one configuration data client (112).
    Specifically, the hardware configuration module (108) is configured to:
    - receive a command (CMD) from the processing unit (102), wherein the command (CMD) comprises an access request to the configuration data stored in the register of one of the at least one configuration data client (112); and
    - selectively execute the access request.

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