公开(公告)号：FR2834242B1

公开(公告)日：2004-07-02

申请号：FR0205465

申请日：2002-04-30

Applicant: MEMSCAP ,  MEMSCAP

Inventor： GIRARDIE LIONEL

IPC: C23C14/08 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01B3/12 ,  C01G27/00 ,  H01G4/20 ,  H01G4/33 ,  H01L21/28 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01L29/51 ,  H01L29/78 ,  B32B33/00 ,  B32B9/00

Abstract: Multilayer structure used as a material having high permittivity comprises a number of layers each of thickness less than 500 Angstroms. Some of the layers are based on aluminum, hafnium and oxygen, notably hafnium dioxide (HfO2) and alumina (Al2O3). Preferably, these layers comprise mixed oxides of formula HfxAlyOz whose stoichiometry varies from one layer to another. Preferred Features: The thickness of each layer is 1-200 Angstrom , preferably 1-100 Angstrom , and most preferably 1-50 Angstrom . The structure comprises at least five layers. At least one of the external layers is alumina (Al2O3). Each layer is deposited by atomic layer deposition (ALD).

公开(公告)号：WO2003069655A3

公开(公告)日：2003-08-21

申请号：PCT/FR2003/000231

申请日：2003-01-24

Applicant: MEMSCAP ,  GIRARDIE, Lionel

Inventor： GIRARDIE, Lionel

IPC: H01L21/02

Abstract: Micro-composant électronique (1) réalisé ô partir d'un substrat semi-conducteur (2), comportant une structure capacitive réalisée au dessus du plan principal (7) du substrat, caractérisé en ce que la structure capacitive comporte deux électrodes (20,33) formées chacune d'une portion plane (11,38) parallèle au plan principal (7) du susbstrat, et d'une pluralité de parois (16-18,34-37) parallèles entre elles et perpendiculaires ô la portion plane (11,38) ô laquelle elles sont raccordées, les parois parallèles de chaque électrode étant intercalées les unes (16-18) entre les autres (34-37).

公开(公告)号：WO2003037184A1

公开(公告)日：2003-05-08

申请号：PCT/FR2002/002077

申请日：2002-06-16

Applicant: MEMSCAP ,  LABORATOIRES LA LICORNE ,  KARAM, Jean-Michel ,  VIVIANT, Eric

Inventor： KARAM, Jean-Michel ,  VIVIANT, Eric

IPC: A61B5/103

CPC classification number: A61B5/14539 ,  A61B5/01 ,  A61B5/1077 ,  A61B5/441 ,  A61B2562/028

Abstract: Appareil d'analyse des propriétés physico-chimiques d'une surface cutanée, comportant :§ un ensemble de capteurs rassemblés et localisés au niveau d'une zone d'acquisition (4) en regard de laquelle est destinée ô venir ladite surface cutanée ô analyser ;une unité de traitement (1) interfacée avec l'ensemble des capteurs, ladite unité étant équipée de moyens d'analyse permettant la détermination de certaines propriétés physico-chimiques de la surface cutanée ô analyser, ô partir des signaux élaborés par ledit ensemble de capteurs.

Abstract translation: 本发明涉及一种用于分析皮肤表面的物理化学性质的装置，包括：一组传感器，其组装在采集区（4）处，相对于其被分析的皮肤表面定位; 以及与所述传感器组接口的处理单元（1），所述单元配备有分析装置，其可以用于使用由所述传感器组产生的信号来确定要分析的皮肤表面的某些物理化学性质。

公开(公告)号：WO2005022452A2

公开(公告)日：2005-03-10

申请号：PCT/FR2004050384

申请日：2004-08-19

Applicant: MEMSCAP ,  HELIN PHILIPPE ,  RANSCH PASCAL

Inventor： HELIN PHILIPPE ,  RANSCH PASCAL

IPC: G06K19/063 ,  G06K19/14 ,  G06K19/16

CPC classification number: G06K19/063 ,  G06K19/14 ,  G06K19/16

Abstract: The invention relates to a marking device (1) comprising an element which is made from a semi-conductor material having patterns (2-4, 12-14) which are hollowed out of the face thereof, the arrangement of said patterns being representative of at least one piece of information. The depth of the patterns (2-4, 12-14) can vary from one pattern to another and can adopt a plurality of different values which are representative of an additional piece of information. The invention also relates to an apparatus which is used to detect such marks and to articles having a marking device of said type integrated into the material forming same.

Abstract translation: 本发明涉及一种标记装置（1），其包括由半导体材料制成的元件，所述元件具有从其表面挖空的图案（2-4,12-14），所述图案的布置代表 至少有一条信息。 图案（2-4,12-14）的深度可以从一个图案到另一个图案变化，并且可以采用表示附加信息的多个不同值。 本发明还涉及用于检测这种标记的设备以及具有集成到形成该标记的材料的所述类型的标记设备的物品。

公开(公告)号：WO2003069655A2

公开(公告)日：2003-08-21

申请号：PCT/FR2003/000231

申请日：2003-01-24

Applicant: MEMSCAP ,  GIRARDIE, Lionel

Inventor： GIRARDIE, Lionel

IPC: H01L21/02

CPC classification number: H01L29/511 ,  C23C16/40 ,  H01L21/28167 ,  H01L21/31604

Abstract: Micro-composant électronique (1) réalisé ô partir d'un substrat semi-conducteur (2), comportant une structure capacitive réalisée au dessus du plan principal (7) du substrat, caractérisé en ce que la structure capacitive comporte deux électrodes (20,33) formées chacune d'une portion plane (11,38) parallèle au plan principal (7) du susbstrat, et d'une pluralité de parois (16-18,34-37) parallèles entre elles et perpendiculaires ô la portion plane (11,38) ô laquelle elles sont raccordées, les parois parallèles de chaque électrode étant intercalées les unes (16-18) entre les autres (34-37).

Abstract translation: 公开了一种基于半导电基板（2）制成的电子微型部件（1），其包括施加在基板的主平面（7）的顶部上的电容结构。 电容结构设置有两个电极（20,33），每个电极包括平行于衬底的主平面（7）延伸的平坦部分（11,38）和多个壁（16-18,34- 37），其平行于彼此并且垂直于所述壁连接到的平坦部分（11,38）。 每个电极的平行壁在另一个（34-37）之间布置成一个（16-18）。

公开(公告)号：JP2003308735A

公开(公告)日：2003-10-31

申请号：JP2002378529

申请日：2002-12-26

Applicant: Memscap ,  メムスカップ

Inventor： GIRARDIE LIONEL

IPC: C01G27/00 ,  C23C14/08 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01B3/12 ,  H01G4/20 ,  H01G4/33 ,  H01L21/28 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L21/28185 ,  C23C16/40 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/28194 ,  H01L21/31604 ,  H01L29/513 ,  H01L29/517 ,  Y10T428/265

Abstract: PROBLEM TO BE SOLVED: To provide a material, which can be used in various capacitive structures, having high relative permittivity, high voltage proof property and low level of leakage current. SOLUTION: The multilayer structure comprises a plurality of separate layers such having a thickness less than 500 Å, wherein at least one of the layers is based on hafnium dioxide (HfO 2 ), zirconium dioxide (ZrO 2 ) or alumina (Al 2 O 3 ). COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供可用于各种电容结构的材料，具有高相对介电常数，高耐电压性和低漏电流。 解决方案：多层结构包括多个单独的层，其厚度小于500，其中至少一个层是基于二氧化铪（HfO 2 SB 2），二氧化锆（ ZrO 2 / SB 3）或氧化铝（Al 2 O 3 SB 3）。 版权所有（C）2004，JPO

公开(公告)号：JP2003303514A

公开(公告)日：2003-10-24

申请号：JP2002378530

申请日：2002-12-26

Applicant: Memscap ,  メムスカップ

Inventor： GIRARDIE LIONEL

IPC: C01G27/00 ,  C23C14/08 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01B3/12 ,  H01G4/20 ,  H01G4/33 ,  H01L21/28 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L21/28194 ,  C23C16/40 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/31604 ,  H01L29/513 ,  H01L29/517 ,  Y10T428/24975

Abstract: PROBLEM TO BE SOLVED: To provide a material usable in various capacitive structures, with high relative permittivity values, high voltage resistance, and low level leak current. SOLUTION: This multilayer structure is constituted of a plurality of different layers, each has a thickness of less than 500 Å, and some layers of a plurality of layers are based on aluminum, hafnium, and oxygen. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供可用于各种电容结构的材料，具有高相对介电常数值，高电压电阻和低电平漏电流。 解决方案：该多层结构由多个不同的层构成，每个层具有小于500埃的厚度，并且多个层的一些层基于铝，铪和氧。 版权所有（C）2004，JPO

公开(公告)号：JP2003243526A

公开(公告)日：2003-08-29

申请号：JP2002378532

申请日：2002-12-26

Applicant: MEMSCAP

Inventor： GIRARDIE LIONEL

IPC: H01L27/04 ,  C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  H01L21/28 ,  H01L21/316 ,  H01L21/822 ,  H01L29/51

Abstract: PROBLEM TO BE SOLVED: To provide an electronic component having a micro-capacitor of a high capacitance value. SOLUTION: In an integrated circuit and the electronic component having a planar micro-capacitor integrated thereinto which are formed on a substrate (1), the capacitor is so formed on the uppermost surface of the metallization surface of the component that the metallization surface is formed into a first electrode (2) of the capacitor. Further, the capacitor has a first barrier layer (5) containing diffused oxygen which is deposited on the uppermost surface of the metallization surface (2); stacks (6) of a plurality of different oxide layers having their respective thicknesses not larger than 100 nm deposited on the uppermost portion of the first barrier layer (5); a second barrier layer (7) containing diffused oxygen which is deposited on the uppermost portion of the stack (6) of the oxide layer; and a metal electrode (20) present on the uppermost portion of the second barrier layer (7). COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2000277693A

公开(公告)日：2000-10-06

申请号：JP2000080808

申请日：2000-03-22

Applicant: MEMSCAP ,  PLANHEAD SILMAG PHS

Inventor： BASTERES LAURENT ,  MHANI AHMED ,  VALENTIN FRANCOIS ,  KARAM JEAN-MICHEL

IPC: H01L21/822 ,  H01F17/00 ,  H01L21/02 ,  H01L23/522 ,  H01L27/04

Abstract: PROBLEM TO BE SOLVED: To provide a compact monolithic integrated circuit with superior electrical characteristics, particularly Q-values, of inductive elements with respect to electrical characteristics. SOLUTION: A monolithic integrated circuit 1 with an incorporated inductive element 20 has a semiconductor substrate layer 2, a passivation layer 4 covering the semiconductor substrate layer 2 and metallic contact pads 5 which are connected to the substrate 2 and pierce the passivation layer 4, in order to have the pad surfaces on the same plane as the top surface 6 of the passivation layer 4. The integrated circuit also includes the whirlpool shape winding 20, formed in a plane parallel with a top surface 6 of the passivation layer 4. The winding 20 consists of copper turns 21-23, 27 and 28 with thicknesses of not smaller than 10 μm. The ends of the winding 20 are extended downward from the winding plane, so as to form extended parts 12 connected to the contact pads 5.

公开(公告)号：US20030098766A1

公开(公告)日：2003-05-29

申请号：US10303401

申请日：2002-11-25

Applicant: MEMSCAP (Societe Anonyme)

Inventor： Lionel Girardie ,  Jean-Baptiste David

IPC: H01L021/00 ,  H01L021/44 ,  H01F005/00

CPC classification number: H01L28/10 ,  H01L21/2885 ,  H01L21/76838 ,  H01L27/08

Abstract: The invention relates to a process for fabricating electronic components incorporating an inductive microcomponent placed on top of a substrate. Such a component comprises: a layer (10) of material having a low relative permittivity, lying on the top face of the substrate (1); a number of metal turns (30-31) defined on top of the layer (10) of material having a low relative permittivity; and a copper-diffusion barrier layer (15) interposed between the metal turns (30-31) and the layer of material having a low relative permittivity.

Abstract translation: 本发明涉及一种用于制造电子部件的方法，该电子部件包含放置在基板顶部上的感应微元件。 这种部件包括：位于基板（1）的顶面上的具有低相对介电常数的材料层（10）; 限定在具有低相对介电常数的材料层（10）的顶部上的多个金属匝（30-31）; 以及介于所述金属匝（30-31）和所述相对介电常数低的材料层之间的铜扩散阻挡层（15）。