公开(公告)号：JPH0844681A

公开(公告)日：1996-02-16

申请号：JP7759395

申请日：1995-04-03

Applicant: SYMBIOS LOGIC INC

Inventor： RODONII EI DEKONINGU ,  TEIMOSHII II HOGURANDO

IPC: G06F15/16 ,  G06F9/50 ,  G06F9/52 ,  G06F13/18 ,  G06F13/36 ,  G06F15/177

Abstract: PURPOSE: To efficiently share a resource, and to escape the generation of a dead lock state when plural processors share access and control to a common resource. CONSTITUTION: This is a resource assignment logic for a computer system including plural processors which share access and control to plural resources such as a disk drive unit or a bus. This resource assignment logic adjusts the execution of a request received from the processor, and escapes the insufficient sharing of the resource, or the generation of a dead lock state. The resource assignment logic holds a 'request' queue for each processor, and executes the quick and fair processing of all the requests. An entry corresponding to each request received from the corresponding processor, and the identification name of the resource requested by the request corresponding to the entry are inputted in the request queue.

公开(公告)号：JPH07326138A

公开(公告)日：1995-12-12

申请号：JP12205395

申请日：1995-05-22

Applicant: SYMBIOS LOGIC INC

Inventor： ARAN DEII POTSUPURUMAN

IPC: G11B20/14 ,  G11B20/10 ,  H04L7/00 ,  H04L7/033

Abstract: PURPOSE: To obtain a digital data separator which shows allowable ranges in jitter and rate fluctuations in a digital data stream. CONSTITUTION: The digital data separator 10 separates clock information and data from a data stream that is influenced by an amount of change in jitter undesirable when an error is carried into the data. A window generator 30 generates a read data window of a controlled continuation time to sample the input data, and the current optimum estimate of the continuation time of this window is stored in a duration register 50 as a time register value. And (duration register value -1) is put in a time register 55 as a time register value so that, during reverse count cycle, a value 1 is subtracted from the time register value in each clock cycle to execute the reverse count cycle. Toggle is applied to the read data window so that, when the time register value nears zero, a new read data window is started and the value remaining in the time register 55 is specified as a reminder.

公开(公告)号：JPH10207833A

公开(公告)日：1998-08-07

申请号：JP26538397

申请日：1997-09-30

Applicant: SYMBIOS LOGIC INC

Inventor： ROBERT A DEAMOSS

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/372 ,  G06F17/30 ,  H04L12/40

Abstract: PROBLEM TO BE SOLVED: To improve unfairness of arbitration by a SCSI bus allocating device. SOLUTION: Respective devices 106 which require arbitration on a SCSI bus 104 before trying the SCSI bus arbitration select one of time slots at pseudo- random. Then a delay is made for a relative time before the SCSI bus arbitration is started. If a device senses reuse of the SCSI bus at arbitrary time before the delay cycle ends, the device lose the right to be arbitrated. A 2nd device having already selected the time slot with the shortest delay cycle acquires control over the SCSI bus before the 1st device tries the arbitration. The time slots are selected according to the probability that the respective slots relate to. To allocate the probability to respective slots used by SCSIs, the probability is allocated to, for example, up to seven devices which share four time slots.

公开(公告)号：JPH10117446A

公开(公告)日：1998-05-06

申请号：JP15182197

申请日：1997-06-10

Applicant: SYMBIOS LOGIC INC

Inventor： FARRIS RICHARD D

IPC: H02J7/34 ,  H01M10/44 ,  H02J9/06 ,  H02M3/00

Abstract: PROBLEM TO BE SOLVED: To quickly charge a battery by connecting a transistor and a resistor in series to a charging voltage source, a transistor control circuit, and the battery to be charged. SOLUTION: A transistor 13 and a resistor 17 are connected in series between a battery charging source 12 and a battery 18, so as to control the charging process of the battery 18. When the transistor 13 becomes saturated owing to the current flowing through a base drive resistor 14, the transistor 13 is turned on and the current is supplied by means of a charging control circuit 16 which supplies the current to the resistor 14, when the circuit 16 detects that a main power source 10 is connected. When the main power source 10 is smaller than a preset threshold, the circuit 16 turns off the transistor 13 by stopping the current flowing through the resistor 14. The resistor 14 and circuit 16 jointly constitute a transistor control circuit.

公开(公告)号：JPH1070238A

公开(公告)日：1998-03-10

申请号：JP12823497

申请日：1997-05-19

Applicant: SYMBIOS LOGIC INC

Inventor： WALKER JOHN D ,  DANIEL DAVID W

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02

Abstract: PROBLEM TO BE SOLVED: To shorten the time required for fabricating a semiconductor device while reducing the cost and the material by incorporating an electrostatic discharge protection circuit into an integrated circuit itself without increasing the labor significantly. SOLUTION: An input pad 20 is connected through resistors 21, 30 with an IN signal line 22 which is connected with another circuit on a chip. A thick field device 23 connects Vdd 26 with Vss and functions as a return path of an electrostatic discharge pulse. It is switched to an input protection device before the electrostatic discharge pulse causes any damage onto a running circuit. An SCR 28 provides an independent path 29 from the input pad 20 to the Vss. The resistors 21, 30 limit current to the IN signal line 22 and an IN signal gives the SCR 28 a chance for turning on and shunting the electrostatic discharge pulse. The resistor 21 has a resistance of 10Ω and the resistor 31 has a resistance of 150-200Ω.

公开(公告)号：JPH1031554A

公开(公告)日：1998-02-03

申请号：JP7682297

申请日：1997-03-28

Applicant: SYMBIOS LOGIC INC

Inventor： CALLICOTT STEVEN P ,  TETERWAK JERZY A

IPC: G06F3/041 ,  G02B27/20 ,  G03B21/132 ,  G06F3/033 ,  G06F3/038 ,  G06F3/042 ,  G06F3/046 ,  G06F3/03

Abstract: PROBLEM TO BE SOLVED: To permit a presenter to give a mark on a picture projected on a projection display board or to annotate it by means of moving from an input device by providing a stylus part transmitting a signal to a digitizer and a laser pointer part indicating an object for a base. SOLUTION: A computer 12 contains a digitized tablet 22 on the screen 20 of a display monitor 19. When the tip of the stylus part 34 of the data input device 28 is brought into contact with the upper surface of a tablet 22, a battery part 32 supplies power to an oscillator part 40 and a signal 44 used when the computer 12 judges the position and the operation mode of the data input device 28 is transmitted. Then, data is inputted to the computer 12 by the stylus part 34 of the data input device 28 and data projected on the projection board 18 can be emphasized by using the laser pointer part 36.

公开(公告)号：JPH09282104A

公开(公告)日：1997-10-31

申请号：JP34532396

申请日：1996-12-25

Applicant: SYMBIOS LOGIC INC

Inventor： RODONII EI DEKONINGU ,  DONARUDO AARU HAMURISEKU ,  KAATEISU DABURIYUU RINKU

IPC: G06F3/06 ,  G06F11/14 ,  G06F11/20 ,  G11B20/18

Abstract: PROBLEM TO BE SOLVED: To provide a method for improving the performance of a data processing system and the device. SOLUTION: The data processing system 100 is provided with plural storage devices and a backup storage device 106 and the backup storage device 106 is environmentally set as a log (log: recording) device. Data are logged (recorded) in the backup storage device 106 after the backup storage device 106 is environmentally set as the log device. When a fault is generated in one of the plural storage devices, the backup storage device 106 is environmentally set again corresponding to it and used instead of the storage device in which the fault is generated.

公开(公告)号：JPH09149019A

公开(公告)日：1997-06-06

申请号：JP19174896

申请日：1996-07-22

Applicant: SYMBIOS LOGIC INC

Inventor： DAOORON CHIEN

IPC: H03L7/06 ,  H03L7/07 ,  H03L7/099 ,  H04L7/033

Abstract: PROBLEM TO BE SOLVED: To provide a clock/data recovering technique capable of executing an operation at high-speed data transfer with little area occupation. SOLUTION: In this method, a clock signal buried inside an input data stream is recovered. At this time, the input data stream is supplied to a data sampling circuit 14 at first. Then, one of plural clock phases is selected and the data sampling circuit 14 is operated in order to obtain the clock signal by buring it. After that, the clock signal which is recovered based on the selected clock movement is generated. Then, a retiming circuit is operated by a normal data tracking mode for retiming the input data stream based on the recovered clock signal and also the operation function of the data sampling circuit 14 is restricted while the retiming circuit is operated by the normal data tracing mode.

公开(公告)号：JPH096498A

公开(公告)日：1997-01-10

申请号：JP14477396

申请日：1996-05-01

Applicant: SYMBIOS LOGIC INC

Inventor： BURAIAN II RAMUKIN ,  REIMONDO ESU ROUHAFU ,  KENESU JIEI TONPUSON

IPC: G06F1/18 ,  G06F3/00 ,  G06F13/40 ,  H01R29/00 ,  H01R31/00

Abstract: PROBLEM TO BE SOLVED: To provide a method and system for suitably and automatically terminating the mutual connection of various mutual connection systems to a bus. SOLUTION: A cable 12 connected to an adaptor card 10 can be automatically terminated. The existence of a device connected to such a cable 12 is detected. A terminal circuit is selectively started in accordance with a device connected to the card 10 and the terminating operation of the cable 12 is executed. In an embodiment, plural different types of devices having respectively different data length values are connected to a normal adapator card 10 through plural cables 12. These cables 12 regulate the the mutual connection of the devices to the card 10 based upon a bus protocol. A signal to be transmitted/received to/from the cable 12 is sourced/sunk from/into a controller chip. A terminal circuit adjacent to the controller chip 15 selectively started in accordance with the type of a device connected to a bus and termination is presented to the host side of the bus.

公开(公告)号：JPH08297628A

公开(公告)日：1996-11-12

申请号：JP6066796

申请日：1996-03-18

Applicant: SYMBIOS LOGIC INC

Inventor： RICHIYAADO DEII KAAMAIKERU ,  JIYOERU EMU UOODO ,  MAIKERU EE UINCHIERU

IPC: G06F13/12 ,  G06F13/28

Abstract: PROBLEM TO BE SOLVED: To improve the inputting/outputting performance of a computer system under the control of the multisleded operating system of a multitasking. SOLUTION: This is a device and method for chaining the continuous DMA distributed collection sub-block of a PRD table for a channel 0 with the continuous DMA distributed collection sub-block of the PRD table for a channel 1 while maintaining the maximum media band width by using a single data manager 124. The DMA block transfer is scheduled based on the validity of data from the buffer memory of an I/O device, so that the idle time of a media or a network can be minimized, and the idle time of an I/O bus can be minimized. Thus, almost the maximum aggregate band width of multiple I/O buses and devices related with them can be obtained.