公开(公告)号：KR1020120050313A

公开(公告)日：2012-05-18

申请号：KR1020100111743

申请日：2010-11-10

Applicant: 삼성전자주식회사

Inventor： 류수정 ,  박성배 ,  서웅 ,  조영철 ,  김정욱 ,  정무경 ,  김호영

IPC: G06F9/30 ,  G06T1/60 ,  G06F12/02

CPC classification number: G06T1/60 ,  G06F9/30134 ,  G06F9/30101 ,  G06F12/02

Abstract: PURPOSE: A computing device through an X-Y memory and a method thereof are provided to rapidly process image data without overhead by performing pop or push operation of data. CONSTITUTION: A memory unit(101) defines an address space based on a multidimensional space having two shafts. A memory access unit(102) includes a first pointer register in which a first pointer is stored and a second pointer register in which a second pointer is stored. The memory unit is a stack memory for storing data according to a LIFO(Last-In First-Out) mode. The memory access unit fixes the first pointer and reduces the second pointer.

Abstract translation: 目的：提供通过X-Y存储器的计算设备及其方法，通过执行数据的弹出或推送操作来快速处理图像数据而无需开销。 构成：存储单元（101）基于具有两个轴的多维空间来定义地址空间。 存储器访问单元（102）包括其中存储有第一指针的第一指针寄存器和存储第二指针的第二指针寄存器。 存储器单元是用于根据LIFO（先进先出）模式存储数据的堆栈存储器。 存储器访问单元固定第一指针并减少第二指针。

公开(公告)号：KR1020080042336A

公开(公告)日：2008-05-15

申请号：KR1020060110617

申请日：2006-11-09

Applicant: 삼성전자주식회사

Inventor： 박기호 ,  박성배 ,  김신덕 ,  김정길 ,  이인직

IPC: H04N19/51

CPC classification number: H04N19/567 ,  H04N19/51 ,  H04N19/52 ,  H04N19/533 ,  H04N19/557

Abstract: An image searching method for motion estimation is provided to perform a decoding operation according to H.264 standard at a high speed by reducing a computing amount required for motion estimation. An image searching method for motion estimation includes: comparing an estimated minimum SAD(Sum of Absolute Difference) value with a threshold value(S510); determining a code of a motion vector(S520); calculating absolute values of gradients of base frames n and n-1(S530); judging whether both of an amplitude of a first gradient and an amplitude of a second gradient are 1(S540); judging whether the amplitude of the first gradient is less than 1(S550); extending a region in which a selective UMHGS search is performed in a horizontal direction(S555); judging whether the amplitude of the first gradient is greater than 1(S560); determining that the region in which a selective UMHGS search is performed is a uneven hexagon pattern(S570); performing UMHGS search inside the selected region(S580); comparing a newly obtained SAD value with the threshold value and judging whether a selective UMHGS search is terminated(S590).

Abstract translation: 提供了一种用于运动估计的图像搜索方法，通过减少运动估计所需的计算量，高速执行根据H.264标准的解码操作。 一种用于运动估计的图像搜索方法包括：将估计的最小SAD（绝对值之和）值与阈值进行比较（S510）; 确定运动矢量的代码（S520）; 计算基本帧n和n-1的梯度的绝对值（S530）; 判断第一梯度的振幅和第二梯度的振幅是否为1（S540）; 判断第一梯度的振幅是否小于1（S550）; 扩展在水平方向执行选择性UMHGS搜索的区域（S555）; 判断第一梯度的振幅是否大于1（S560）; 确定执行选择性UMHGS搜索的区域是不均匀的六边形图案（S570）; 在所选区域内执行UMHGS搜索（S580）; 将新获得的SAD值与阈值进行比较，并判断选择性UMHGS搜索是否终止（S590）。

公开(公告)号：KR100735308B1

公开(公告)日：2007-07-03

申请号：KR1020050079904

申请日：2005-08-30

Applicant: 경북대학교 산학협력단 ,  삼성전자주식회사

Inventor： 박성배

IPC: G06F9/44 ,  H04B1/40

CPC classification number: G06F17/2223 ,  G06F17/27

Abstract: 본 발명은 단문 메시지에 대한 자동 띄어쓰기 프로그램을 기록한 기록 매체에 관한 것이다. 상기 자동 띄어쓰기 프로그램은 학습 모듈과 분류 모듈로 이루어지며, 상기 학습 모듈에 의해 규칙 기반 학습 모델을 이용한 규칙 데이터베이스가 생성되고, 기억 기반 학습 모델을 이용한 오류 라이브러리가 구축된다. 상기 분류 모듈은 상기 학습 모듈에 의해 생성된 규칙 데이터베이스 및 오류 라이브러리와 함께 이동 통신단말기에 탑재되어, 이동 통신 단말기로 수신되는 단문 메시지를 자동 띄어쓰기하여 표시부에 출력한다.
본 발명에 따른 자동 띄어쓰기 프로그램은, 규칙 기반 학습 모델과 기억 기반 학습 모델을 결합하여 구현됨으로써, 적은 용량의 메모리를 구비하고 계산능력이 상대적으로 떨어지는 이동 통신 단말기 등에서도 효율적으로 실행될 수 있게 된다.
규칙 기반 학습 모듈, 기억 기반 학습 모듈, 자동 띄어쓰기, SMS

公开(公告)号：KR1020010045190A

公开(公告)日：2001-06-05

申请号：KR1019990048387

申请日：1999-11-03

Applicant: 삼성전자주식회사

Inventor： 한상옥 ,  박성배

IPC: G06F12/02

Abstract: PURPOSE: A target branch address generation method is provided to detect a definite position of a target branch address in cache lines and instruction groups, and to fetch n continuous instructions irrespective of the instruction groups so that it can take an advantage of a pipeline structure when executing a branch instruction. CONSTITUTION: The method comprises steps of storing a cache line data, an instruction group data and an instruction data as a target branch address, detecting if the instruction to be addressed by the target branch address belongs to the final instruction group of a cache line, designating the start address of the final instruction group as the target branch address in the case that the instruction to be addressed by the target branch address belongs to the final instruction group of a cache line, and designating the target branch address as a start address and fetching n continuous instructions in the case that the instruction to be addressed by the target branch address does not belong to the final instruction group of a cache line.

Abstract translation: 目的：提供目标分支地址生成方法，用于检测高速缓存行和指令组中的目标分支地址的确定位置，并且与指令组无关地获取n个连续指令，使得其可以利用流水线结构 执行分支指令。 构成：该方法包括以下步骤：存储高速缓存行数据，指令组数据和指令数据作为目标分支地址，检测目标分支地址要寻址的指令是否属于高速缓存行的最终指令组， 在由目标分支地址寻址的指令属于高速缓存行的最终指令组的情况下，将最终指令组的起始地址指定为目标分支地址，并将目标分支地址指定为起始地址，以及 在目标分支地址要寻址的指令不属于高速缓存行的最终指令组的情况下，取出n个连续指令。

公开(公告)号：KR1020000032866A

公开(公告)日：2000-06-15

申请号：KR1019980049483

申请日：1998-11-18

Applicant: 삼성전자주식회사

Inventor： 박성배

IPC: H03K19/00

Abstract: PURPOSE: An apparatus of detecting static clock for protecting CMOS dynamic circuit is provided to output an internal clock signal when a clock signal of the external system is abnormal. CONSTITUTION: An apparatus of detecting static clock for protecting CMOS dynamic circuit includes a first R/S flipflop(40) receiving a system clock signal from exterior through a set terminal and receiving the interior clock signal through a reset terminal. A second R/S flipflop(42) accepts a conversed system clock signal through a set terminal and accepts the interior clock signal through a reset terminal. A third R/S flip flop(58) receives the output of a logical sum conversed system clock signal through a set terminal and receives an enable signal through a reset terminal.

Abstract translation: 目的：提供一种用于保护CMOS动态电路的静态时钟检测装置，用于当外部系统的时钟信号异常时输出内部时钟信号。 检测静态时钟用于保护CMOS动态电路的装置包括：第一R / S触发器（40），其通过设置端接收来自外部的系统时钟信号，并通过复位端接收内部时钟信号。 第二个R / S触发器（42）通过一个设置的终端接受一个转换的系统时钟信号，并通过复位端接收内部时钟信号。 第三R / S触发器（58）通过设置端接收逻辑和转换的系统时钟信号的输出，并通过复位端接收使能信号。

公开(公告)号：KR100817093B1

公开(公告)日：2008-03-26

申请号：KR1020070026257

申请日：2007-03-16

Applicant: 삼성전자주식회사

Inventor： 김진성 ,  박성배

IPC: H01L21/336

CPC classification number: H01L29/1083 ,  H01L29/1045 ,  H01L29/665 ,  H01L29/7833

Abstract: A semiconductor device including an island region is provided to reduce the threshold voltage of a semiconductor device and increase operation current by disposing an island region in an active region. A semiconductor substrate(105) includes an active region(115) confined by an isolation layer(110). A source region(140) of a first conductivity type and a drain region(145) of the first conductivity type are formed in the active region, separated from each other. An island region(150) of the first conductivity type are confined in the active region between the source region and the drain region. The island region can be separated from the source region and the drain region.

Abstract translation: 提供包括岛状区域的半导体器件，以通过在活性区域中设置岛状区域来降低半导体器件的阈值电压并增加操作电流。 半导体衬底（105）包括由隔离层（110）限制的有源区（115）。 第一导电类型的源区（140）和第一导电类型的漏区（145）形成在有源区中，彼此分离。 第一导电类型的岛区域（150）被限制在源极区域和漏极区域之间的有源区域中。 岛区域可以与源极区域和漏极区域分离。

公开(公告)号：KR1020070027933A

公开(公告)日：2007-03-12

申请号：KR1020050079904

申请日：2005-08-30

Applicant: 경북대학교 산학협력단 ,  삼성전자주식회사

Inventor： 박성배

IPC: G06F9/44 ,  H04B1/40

CPC classification number: G06F17/2223 ,  G06F17/27

Abstract: A recording medium storing an automatic word spacing program for a short message is provided to offer an automatic word spacing program to be loaded/executed in a device having small memory capacity and lower calculation ability by combining a rule-based learning algorithm and a memory-based learning algorithm. A rule database(110) stores word spacing rules applied to each character forming the short message. An error library(120) stores error types not applied by the word spacing rules stored in the rule database and word spacing types applied to each error type. The word spacing program(10) for the short message performs automatic spaces words for each character forming the received short message by using the rule database and the error library.

Abstract translation: 提供一种存储用于短消息的自动字距程序的记录介质，以通过组合基于规则的学习算法和存储器间隔程序来提供在具有小存储容量和较低计算能力的设备中加载/执行的自动字间距程序， 基于学习算法。 规则数据库（110）存储应用于形成短消息的每个字符的字间隔规则。 错误库（120）存储未被规则数据库中存储的字间隔规则应用的错误类型，并应用于每个错误类型的字间距类型。 用于短消息的字间隔程序（10）通过使用规则数据库和错误库来为形成接收到的短消息的每个字符执行自动空格字。

公开(公告)号：KR100493046B1

公开(公告)日：2005-06-07

申请号：KR1020030006790

申请日：2003-02-04

Applicant: 삼성전자주식회사

Inventor： 정건옥 ,  박성배

IPC: H03B19/00

CPC classification number: H03K5/00006 ,  G06F7/68 ,  H03K5/1565 ,  H03L7/0814

Abstract: 클럭의 듀티 사이클을 조정할 수 있는 주파수 체배기 및 체배방법이 개시된다. 본 발명에 따른 주파수 체배기는 제 1클럭을 수신하고 제 1클럭을 소정시간 지연시킨 지연클럭을 출력하는 지연회로; 상기 제 1클럭 및 상기 지연클럭을 수신하고 상기 제 1클럭 및 상기 지연클럭을 배타적 논리합하여 제 2클럭을 출력하는 배타적 논리합 수단; 및, 상기 제 1클럭 및 상기 지연클럭의 위상차이를 검출하고, 검출된 상기 위상차이에 대응되는 소정의 제어신호를 상기 지연회로로 출력하는 제어회로를 구비하고, 상기 제어신호는 상기 지연회로의 지연량을 제어하는 것을 특징으로 한다. 본 발명에 따르면, 제어신호에 응답하여 지연회로의 지연량을 조절함으로써, 체배되는 클럭의 듀티 사이클을 자동적으로 조정할 수 있으며, 외부로부터 리셋신호를 입력받을 필요없이 제 1클럭의 주기 내에서 자동적으로 생성된다.

公开(公告)号：KR1020040022646A

公开(公告)日：2004-03-16

申请号：KR1020020054258

申请日：2002-09-09

Applicant: 삼성전자주식회사

Inventor： 박성배

IPC: G06F12/08

CPC classification number: G06F9/3802 ,  G06F9/3861 ,  G06F12/0848

Abstract: PURPOSE: A processor having a cache structure improving an operation speed of the processor and a cache managing method are provided to improve the operation speed of the processor by reducing the time needed to switch execution between a normal program and an exceptional program. CONSTITUTION: A cache memory includes a normal program cache(22) storing an instruction to execute the normal program and an exceptional program cache(24) storing the instruction to execute the exceptional program. An instruction register(28) stores the instruction by fetching the instruction to the cache memory. Judging whether the current executing program is the normal program or the exceptional program, the processor(20) fetches one instruction from the normal and the exceptional program cache, and inputs the instruction to the instruction registry by using a multiplexer(26).

Abstract translation: 目的：提供具有提高处理器的操作速度的缓存结构的处理器和高速缓存管理方法，以通过减少在正常程序和异常程序之间切换执行所需的时间来提高处理器的操作速度。 构成：缓存存储器包括存储执行正常程序的指令的正常程序缓存（22）和存储执行异常程序的指令的异常程序高速缓存（24）。 指令寄存器（28）通过将指令读取到高速缓存存储器来存储指令。 判断当前执行程序是正常程序还是异常程序，处理器（20）从正常程序缓存和异常程序缓存中取出一个指令，并通过使用多路复用器（26）将指令输入到指令注册表。

公开(公告)号：KR100347865B1

公开(公告)日：2002-08-09

申请号：KR1019990050627

申请日：1999-11-15

Applicant: 삼성전자주식회사

Inventor： 박성배

IPC: G06F9/38

CPC classification number: G06F9/381 ,  G06F9/325 ,  G06F9/3808

Abstract: 여기에개시된어드레스트레이스를이용한분기예측방법은, 수행되는명령어에대응되는어드레스트레이스자체를디코딩된 형태로저장한다. 상기분기예측방법은, 반복되는루틴의시작어드레스와종료어드레스를지정한후, 상기루틴이현재억세스되고있는횟수와전체억세스횟수를비교함으로써상기루틴의종료를확인하고, 다음에수행될루틴의어드레스정보를저장한다. 이와같은방법에의해서, 반복되어수행되는루틴에대한억세스정보를적은용량의트레이스캐쉬를이용하여저장할수 있다.