公开(公告)号：US12040229B2

公开(公告)日：2024-07-16

申请号：US17989875

申请日：2022-11-18

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Steven van Aerde ,  Bert Jongbloed

IPC: H01L21/768 ,  G11C5/02 ,  G11C5/06 ,  H01L23/538 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L21/76879 ,  G11C5/025 ,  G11C5/06 ,  H01L21/76802 ,  H01L23/5384 ,  H10B41/27 ,  H10B43/27

Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.

公开(公告)号：US20230223258A1

公开(公告)日：2023-07-13

申请号：US18153282

申请日：2023-01-11

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Kelly Houben ,  Steven Van Aerde ,  Wilco Verweij ,  Bert Jongbloed ,  Charles Dezelah

IPC: H01L21/02 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  C30B25/18

CPC classification number: H01L21/0262 ,  H01L21/02532 ,  H01L21/02661 ,  C30B25/165 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  C30B25/186

Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing plurality of substrates to a process chamber. A plurality of deposition cycles are executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial comprises a plurality of epitaxial pairs, each pair comprising a first epitaxial layer and a second epitaxial layer. The deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer and the second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer

公开(公告)号：US20230175136A1

公开(公告)日：2023-06-08

申请号：US18101666

申请日：2023-01-26

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed ,  Jeroen Fluit

IPC: C23C16/48 ,  C23C16/455 ,  C23C16/44 ,  C23C16/458

CPC classification number: C23C16/48 ,  C23C16/45553 ,  C23C16/4405 ,  C23C16/4583

Abstract: The disclosure relates to a substrate processing apparatus, comprising: a first reactor constructed and arranged to process a rack with a plurality of substrates therein; a second reactor constructed and arranged to process a substrate; and, a substrate transfer device constructed and arranged to transfer substrates to and from the first and second reactor. The second reactor may be provided with an illumination system constructed and arranged to irradiate ultraviolet radiation within a range from 100 to 500 nanometers onto a top surface of at least a substrate in the second reactor.

公开(公告)号：US11594450B2

公开(公告)日：2023-02-28

申请号：US16995281

申请日：2020-08-17

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Steven van Aerde ,  Bert Jongbloed

IPC: H01L21/768 ,  H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  H01L23/538 ,  G11C5/02

Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.

公开(公告)号：US20230008131A1

公开(公告)日：2023-01-12

申请号：US17810773

申请日：2022-07-05

Applicant: ASM IP Holding, B.V.

Inventor： Dieter Pierreux ,  Theodorus G.M Oosterlaken ,  Herbert Terhorst ,  Lucian Jdira ,  Bert Jongbloed

IPC: C23C16/44 ,  C23C16/34 ,  C23C16/52 ,  C23C16/455

Abstract: A chemical vapor deposition furnace for depositing silicon nitride films is disclosed. The furnace having a process chamber elongated in a substantially vertical direction and a wafer boat for supporting a plurality of wafers in the process chamber. A process gas injector inside the process chamber is provided with a plurality of vertically spaced gas injection holes to provide gas introduced at a feed end in an interior of the process gas injector to the process chamber. A valve system connected to the feed end of the process gas injector is being constructed and arranged to connect a source of a silicon precursor and a nitrogen precursor to the feed end for depositing silicon nitride layers. The valve system may connect the feed end of the process gas injector to a cleaning gas system to provide a cleaning gas to remove silicon nitride from the process gas injector and/or the processing chamber.

公开(公告)号：US11501968B2

公开(公告)日：2022-11-15

申请号：US17093224

申请日：2020-11-09

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Anna Trovato ,  Kelly Houben ,  Steven van Aerde ,  Bert Jongbloed ,  Wilco A. Verweij

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L21/331 ,  H01L27/092 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L21/311 ,  H01L21/285

Abstract: Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.

公开(公告)号：US11447861B2

公开(公告)日：2022-09-20

申请号：US15380921

申请日：2016-12-15

Applicant: ASM IP Holding B.V.

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Krzysztof Kamil Kachel ,  David Kurt De Roest ,  Bert Jongbloed ,  Dieter Pierreux

IPC: C23C16/455 ,  C23C16/44 ,  H01L21/033 ,  C23C16/448 ,  C23C16/04 ,  C23C16/52 ,  C23C16/56

Abstract: A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber. The program in the memory is programmed with the first period T1 longer than the second period T2.

公开(公告)号：US20210335595A1

公开(公告)日：2021-10-28

申请号：US17370197

申请日：2021-07-08

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/50 ,  C23C16/04 ,  H01L21/762

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.

公开(公告)号：US20210332476A1

公开(公告)日：2021-10-28

申请号：US17113301

申请日：2020-12-07

Applicant: ASM IP Holding B.V.

Inventor： Pia Homm Jara ,  Werner Knaepen ,  Dieter Pierreux ,  Bert Jongbloed ,  Panagiota Arnou ,  Ren-Jie Chang ,  Qi Xie ,  Giuseppe Alessio Verni ,  Gido van der Star

IPC: C23C16/34 ,  H01L21/285 ,  C23C16/44 ,  C23C16/455 ,  C23C16/04 ,  C23C16/56

Abstract: The current disclosure relates to methods of forming a vanadium nitride-containing layer. The method comprises providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate, wherein the deposition process comprises providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber. The disclosure further relates to structures and devices comprising the vanadium nitride-containing layer.

公开(公告)号：US10741385B2

公开(公告)日：2020-08-11

申请号：US16317774

申请日：2017-07-14

Applicant: ASM IP Holding B.V.

Inventor： Viljami Pore ,  Werner Knaepen ,  Bert Jongbloed ,  Dieter Pierreux ,  Gido Van Der Star ,  Toshiya Suzuki

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/50 ,  H01L21/762

Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.