I-Q SIGNAL GENERATOR FOR DQPSK
    11.
    发明专利

    公开(公告)号:JPH066392A

    公开(公告)日:1994-01-14

    申请号:JP15805092

    申请日:1992-06-17

    Applicant: ADVANTEST CORP

    Inventor: NUKUI YOSHIHIRO

    Abstract: PURPOSE:To generate an I.Q signal by high-speed processing with small-scale constitution. CONSTITUTION:Binarized data A and B are inputted to an encoder 13 and also inputted to shift registers 41 and 42 along with their time slots. An encoder 13 converts the two data into one many-valued data along with the time slots and the many-valued data is accumulated and added by a phase accumulator 14. In synchronism with the input binarized data A and B, a clock which is 2 times as large as them is counted by a 2 -ary counter 48. Its counted value, the output of the accumulator 14, and (n)-bit parallel outputs of shift registers 41 and 42 are supplied as an address to an I signal memory 43 and a Q signal memory 44, which are read out. The memory 43 is stored with sum of products arithmetic values of the cosine value of the output of the accumulator 14 as a current phase angle and an impulse response of (nX2 )th order as to respective corresponding cosine values in the respective past time slots before (n) time slots determined by the outputs of the shift registers 41 and 42, and the memory 44 is stored with sum of products arithmetic values as to the sine waves similarly.

    Control device of electronic apparatus
    13.
    发明专利
    Control device of electronic apparatus 失效
    电子装置的控制装置

    公开(公告)号:JPS59173803A

    公开(公告)日:1984-10-02

    申请号:JP4829583

    申请日:1983-03-22

    Applicant: Advantest Corp

    CPC classification number: G05B19/0425 G05B2219/24015

    Abstract: PURPOSE:To simplify the constitution of a system by providing respective apparatuses of the system with simple control devices for I/O controlling and receiving and transferring data from/to the control parts of the apparatuses. CONSTITUTION:An electronic apparatus 2 provided with an I/O control device 15 is connected to an interface (I/O) 11 to monitor and control the I/O of a control part 12. In the I/O control device 15, a signal monitoring means 16 always monitors a signal on a bus line of the I/O 11 and an I/O control means 18 controls the control part 12 by said monitoring information to receive and transfer the signal. The control part 12 controls the operation of a working part 14 on the basis of original setting part 13 and also controls the I/O of a signal and an arithmetic means 17 calculating data or the like to be outputted by a command from an I/O control means 18.

    Abstract translation: 目的:为了简化系统的结构,通过为系统的各个装置提供简单的控制装置,用于I / O控制和接收和传送数据到设备的控制部分。 构成:设置有I / O控制装置15的电子设备2连接到接口(I / O)11,以监视和控制控制部分12的I / O。在I / O控制装置15中, 信号监视装置16总是监视I / O 11的总线上的信号,并且I / O控制装置18通过所述监视信息控制控制部分12以接收和传送信号。 控制部分12基于原始设置部分13控制工作部分14的操作,并且还控制信号的I / O和计算数据等的运算装置17,以通过来自I / O控制装置18。

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