公开(公告)号：US20230128128A1

公开(公告)日：2023-04-27

申请号：US17569238

申请日：2022-01-05

Applicant: Applied Materials, Inc.

Inventor： Pradeep SAMPATH KUMAR ,  Norman L. TAM ,  Dongming IU ,  Shashank SHARMA ,  Eric R. RIESKE ,  Michael P. KAMP

IPC: H01L21/324 ,  H01L21/67 ,  H01L21/321

Abstract: Aspects of the present disclosure relate to methods, systems, and apparatus for conducting a radical treatment operation on a substrate prior to conducting an annealing operation on the substrate. In one implementation, a method of processing semiconductor substrates includes pre-heating a substrate, and exposing the substrate to species radicals. The exposing of the substrate to the species radicals includes a treatment temperature that is less than 300 degrees Celsius, a treatment pressure that is less than 1.0 Torr, and a treatment time that is within a range of 8.0 minutes to 12.0 minutes. The method includes annealing the substrate after the exposing of the substrate to the species radicals. The annealing includes exposing the substrate to molecules, an anneal temperature that is 300 degrees Celsius or greater, an anneal pressure that is within a range of 500 Torr to 550 Torr, and an anneal time that is less than 4.0 minutes.

公开(公告)号：US20190157143A1

公开(公告)日：2019-05-23

申请号：US16260084

申请日：2019-01-28

Applicant: Applied Materials, Inc.

Inventor： Johanes S. SWENBERG ,  Wei LIU ,  Houda GRAOUI ,  Shashank SHARMA ,  Shankar MUTHUKRISHNAN ,  Rene GEORGE

IPC: H01L21/768 ,  H01L21/285

Abstract: Embodiments described herein generally relate to a sequential hydrogenation and nitridization process for reducing interfacial and bulk O atoms in a conductive structure in a semiconductor device. A hydrogenation and plasma nitridization process is performed on a metal nitride layer in a conductive structure prior to deposition of a second metal layer, thereby reducing interfacial oxygen atoms formed on a surface of the metal nitride and oxygen atoms present in the bulk metal layers of the conductive structure. As a result, adhesion of the second metal layer to the metal nitride layer is improved and the electrical resistance of the contact structure is reduced.

公开(公告)号：US20190115219A1

公开(公告)日：2019-04-18

申请号：US16159461

申请日：2018-10-12

Applicant: Applied Materials, Inc.

Inventor： Johanes S. SWENBERG ,  Wei LIU ,  Houda GRAOUI ,  Shashank SHARMA

IPC: H01L21/28 ,  H01L29/45 ,  H01L21/285 ,  H01L21/02 ,  H01L21/321 ,  H01L21/324 ,  H01L29/40

CPC classification number: H01L21/28255 ,  H01L21/02186 ,  H01L21/0234 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/28575 ,  H01L21/3212 ,  H01L21/324 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76862 ,  H01L29/401 ,  H01L29/45 ,  H01L29/452

Abstract: Embodiments described herein generally relate to enable the formation of a metal gate structure with a reduced effective oxide thickness over a similar structure formed via conventional methods. A plasma hydrogenation process followed by a plasma nitridization process is performed on a metal nitride layer in a film stack, thereby removing oxygen atoms disposed within layers of the film stack and, in some embodiments eliminating an oxygen-containing interfacial layer disposed within the film stack. As a result, an effective oxide thickness of the metal gate structure is reduced with little or no accompanying flatband voltage shift. Further, the metal gate structure operates with an increased leakage current that is as little as one quarter the increase in leakage current associated with a similar metal gate structure formed via conventional techniques.

公开(公告)号：US20170148726A1

公开(公告)日：2017-05-25

申请号：US15341896

申请日：2016-11-02

Applicant: Applied Materials, Inc.

Inventor： Stephen MOFFATT ,  Abhilash J. MAYUR ,  Theodore P. MOFFITT ,  Aaron Muir HUNTER ,  Shashank SHARMA ,  Bruce E. ADAMS ,  Samuel C. HOWELLS ,  Douglas E. HOLMGREN ,  Wolfgang R. ADERHOLD

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/762 ,  H01L21/268

CPC classification number: H01L21/762 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/268 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/41725 ,  H01L29/45

Abstract: A semiconductor processing method and semiconductor device are described. The processing method includes forming a p-doped germanium structure on a substrate, annealing the p-doped germanium structure using pulses of laser radiation, and forming a titanium structure in direct contact with the p-doped germanium structure.

公开(公告)号：US20150311067A1

公开(公告)日：2015-10-29

申请号：US14261017

申请日：2014-04-24

Applicant: Applied Materials, Inc.

Inventor： Shashank SHARMA ,  Jau-Jiun CHEN ,  Wolfgang R. ADERHOLD ,  Kai NG ,  Houda GRAOUI ,  Shankar MUTHUKRISHNAN ,  Abhilash J. MAYUR ,  Gia PHAM

IPC: H01L21/02

CPC classification number: H01L21/02337 ,  H01L21/02332 ,  H01L21/02345 ,  H01L21/02351 ,  H01L21/02354 ,  H01L21/268 ,  H01L21/28202

Abstract: Embodiments of the present disclosure relate to methods for processing a substrate. In one embodiment, the method includes forming a dielectric layer over a substrate, wherein the dielectric layer has a dielectric value of about 3.9 or greater, heating the substrate to a first temperature of about 600 degrees Celsius or less by a heater of a substrate support disposed within a process chamber, and incorporating nitrogen into the dielectric layer in the process chamber by annealing the dielectric layer at a second temperature between about 650 and about 1450 degrees Celsius in an ambient nitrogen environment, wherein the annealing is performed on the order of millisecond scale.

Abstract translation: 本公开的实施例涉及用于处理衬底的方法。 在一个实施例中，该方法包括在衬底上形成电介质层，其中电介质层的电介质值约为3.9或更大，通过衬底支撑件的加热器将衬底加热至约600摄氏度或更低的第一温度 设置在处理室内，并且通过在环境氮环境中在约650℃和约1450摄氏度之间的第二温度下退火介电层，将氮气并入处理室中的介电层中，其中退火是在毫秒级 规模。

公开(公告)号：US20150064933A1

公开(公告)日：2015-03-05

申请号：US14472825

申请日：2014-08-29

Applicant: Applied Materials, Inc.

Inventor： Shashank SHARMA ,  Shankar MUTHUKRISHNAN ,  Abhilash J. MAYUR

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/324

CPC classification number: H01L21/02683 ,  H01L21/02532 ,  H01L21/268 ,  H01L21/324 ,  H01L21/67115 ,  H01L21/67248

Abstract: A method is disclosed for crystallizing semiconductor material so that it has large grains of uniform size comprising delivering a first energy exposure of high intensity and short duration, and then delivering at least one second energy exposures of low intensity and long duration. The first energy exposure heats the substrate to a high temperature for a duration less than about 0.1 sec. The second energy exposure heats the substrate to a lower temperature for a duration greater than about 0.1 sec.

Abstract translation: 公开了一种用于使半导体材料结晶的方法，使得其具有均匀尺寸的大晶粒，包括递送高强度和短持续时间的第一能量曝光，然后传递至少一个低强度和长持续时间的第二能量曝光。 第一能量曝光将基板加热至高于约0.1秒的持续时间。 第二能量曝光将基板加热到较低温度持续大于约0.1秒。

公开(公告)号：US20240290585A1

公开(公告)日：2024-08-29

申请号：US18113509

申请日：2023-02-23

Applicant: Applied Materials, Inc.

Inventor： Pradeep SAMPATH KUMAR ,  Norman L. TAM ,  Shashank SHARMA ,  Eric R. RIESKE ,  Victor CALDERON ,  Mahesh RAMAKRISHNA ,  Michael P. KAMP ,  Dongming IU ,  Edward T. XIA ,  Eric T. TRAN

IPC: H01J37/32 ,  H01L21/768

CPC classification number: H01J37/32834 ,  H01J37/32449 ,  H01J37/32522 ,  H01J37/32899 ,  H01L21/76886 ,  H01J37/32357 ,  H01J37/32743 ,  H01J2237/1825 ,  H01J2237/336

Abstract: A method of post-deposition processing includes performing a preheat process in a radical treatment chamber, the preheat process comprising exposing a substrate having a metal layer formed thereon to purge gas and purging the purge gas at a pressure of between 400 Torr and 535 Torr, and performing a radical treatment process in the radical treatment chamber, the radical treatment process comprising exposing the substrate to radical species.

公开(公告)号：US20240203742A1

公开(公告)日：2024-06-20

申请号：US18387732

申请日：2023-11-07

Applicant: Applied Materials, Inc.

Inventor： Nicolas Louis BREIL ,  Wolfgang R. ADERHOLD ,  Shashank SHARMA ,  Nilay Anil PRADHAN

IPC: H01L21/285 ,  H01J37/32 ,  H01L21/02

CPC classification number: H01L21/28562 ,  H01J37/32357 ,  H01L21/02068 ,  H01J37/321 ,  H01J2237/335

Abstract: A method of forming an electrical contact in semiconductor structure includes performing a selective deposition process on a semiconductor structure having a semiconductor region and a dielectric layer having a trench therewithin, the selective deposition process comprising epitaxially forming a contact layer on the semiconductor region within the trench of the dielectric layer, and performing a microwave anneal process to activate dopants in the epitaxially formed contact layer.

公开(公告)号：US20240087889A1

公开(公告)日：2024-03-14

申请号：US18513008

申请日：2023-11-17

Applicant: Applied Materials, Inc.

Inventor： Xinming ZHANG ,  Abhilash J. MAYUR ,  Shashank SHARMA ,  Norman L. TAM ,  Matthew SPULLER

IPC: H01L21/02 ,  H01L21/30 ,  H10B41/27

CPC classification number: H01L21/02667 ,  H01L21/02238 ,  H01L21/02252 ,  H01L21/3003 ,  H10B41/27 ,  H01L21/02164 ,  H01L21/02532 ,  H10B43/27

Abstract: The present disclosure provides systems and methods for processing channel structures of substrates that include positioning the substrate in a first processing chamber having a first processing volume. The substrate includes a channel structure with high aspect ratio features having aspect ratios greater than about 20:1. The method includes forming a silicon-containing layer over the channel structure to a hydrogen-or-deuterium plasma in the first processing volume at a flow rate of about 10 sccm to about 5000 sccm. The substrate is maintained at a temperature of about 100° C. to about 1100° C. during the exposing, the exposing forming a nucleated substrate. Subsequent to the exposing a thermal anneal operation is performed on the substrate.

公开(公告)号：US20220005704A1

公开(公告)日：2022-01-06

申请号：US17477741

申请日：2021-09-17

Applicant: Applied Materials, Inc.

Inventor： Xuebin LI ,  Wei LIU ,  Gaurav THAREJA ,  Shashank SHARMA ,  Patricia M. LIU ,  Schubert CHU

IPC: H01L21/321 ,  H01L21/285 ,  H01L21/768 ,  H01L21/67 ,  H01L29/40 ,  H01L21/02 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/3205 ,  H01L29/417

Abstract: Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.