公开(公告)号：US20250071889A1

公开(公告)日：2025-02-27

申请号：US18789994

申请日：2024-07-31

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Kung-Tzu Tu ,  Gwo-Shyan Sheu ,  Hsin-Hao Huang ,  Pei-Wen Wang ,  Yu-Chen Ma ,  Erh-Shun Chuang

IPC: H05K1/02 ,  G01R1/073 ,  H05K1/11 ,  H05K1/18

Abstract: A flexible circuit board includes a flexible substrate, a chip, a first test area, first test pads and a circuit layer connected to the chip and the first test pads. A working area and a non-working area are defined on an upper surface of the flexible substrate. The chip is disposed on the working area, the first test area is located within the non-working area and between a third edge and the working area, the first test pads are arranged on the first test area. Flexible circuit boards with different sizes can have the first test area with the same size and can be tested using a probe card with the same specification to lower testing cost.

公开(公告)号：US11309238B2

公开(公告)日：2022-04-19

申请号：US17227470

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/18 ,  H01L23/498 ,  H01L23/00

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.

公开(公告)号：US10999928B1

公开(公告)日：2021-05-04

申请号：US16914844

申请日：2020-06-29

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/11 ,  H05K1/18 ,  H05K1/03

Abstract: A circuit board electrically connected to a chip includes a substrate and a circuit layer. A first conductive line of the circuit layer includes a main line and a branch lead connected with each other. The branch lead provided to increase lead quantity for bonding with the chip includes an extension part and a bonding part which is used for bonding a bump of the chip. During thermal compression, gaps existing between the extension part and the main line and between the bonding part and the main line can prevent solder on the main line from flowing toward the bump and overflowing from the branch lead.

公开(公告)号：US10993319B1

公开(公告)日：2021-04-27

申请号：US16939243

申请日：2020-07-27

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/28

Abstract: A chip package includes a circuit board, a chip and an underfill. A solder resist layer formed on the circuit board is modified in edge profile so as to reduce required amount of the underfill. The fewer underfill is still enough to be filled between the circuit board and the chip, and still can cover circuit lines that are not covered by the solder resist layer to protect the circuit lines from oxidation.

公开(公告)号：US09247635B2

公开(公告)日：2016-01-26

申请号：US14317254

申请日：2014-06-27

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yi-Wen Chen ,  Yin-Chen Lin ,  Ming-Hsiao Ke ,  Yu-Chen Ma

IPC: H05K1/00 ,  H05K1/02

CPC classification number: H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0298 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/09936

Abstract: A flexible substrate includes a base layer, a metallic layer, a solder mask layer and an identifying code, the metallic layer is disposed at a first surface of the base layer, the metallic layer comprises a plurality of traces and at least one bottom block used for defining marked position, wherein the traces and the at least one bottom block are covered with the solder mask layer, wherein above the perpendicular direction of the at least one bottom block of the metallic layer, a pre-marked area is defined on an exposing surface of the solder mask layer and by an outlined edge of the at least one bottom block, and the identifying code is formed within the pre-marked area of the solder mask layer.

Abstract translation: 柔性基板包括基底层，金属层，焊接掩模层和识别代码，金属层设置在基底层的第一表面，金属层包括多个迹线和至少一个使用的底部块 用于限定标记位置，其中所述迹线和所述至少一个底部块被所述焊接掩模层覆盖，其中在所述金属层的所述至少一个底部块的垂直方向上方，预先标记的区域被限定在曝光 焊料掩模层的表面和至少一个底部块的轮廓边缘，并且识别代码形成在焊料掩模层的预先标记的区域内。

公开(公告)号：US11581283B2

公开(公告)日：2023-02-14

申请号：US16910461

申请日：2020-06-24

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/498

Abstract: A flip chip package includes a circuit board, a chip and a solder layer. The chip is mounted on an inner bonding area of the circuit board. The solder layer is located between the circuit board and the chip for bonding bumps to inner leads and a T-shaped circuit unit is on the inner bonding area. The T-shaped circuit unit has a main part, a connection part, and a branch part. The connection part is connected to the main and branch parts, respectively. The main part extends along a lateral direction and the branch part extends outwardly along a longitudinal direction. The connection part is narrower than the main part in width so as to inhibit solder shorts caused by solder overflow on the branch part.

公开(公告)号：US20230044345A1

公开(公告)日：2023-02-09

申请号：US17848481

申请日：2022-06-24

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Pei-Wen Wang ,  Hsin-Hao Huang ,  Gwo-Shyan Sheu

IPC: H05K1/18 ,  H05K1/02 ,  H01L23/498

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a circuit layer, a flip-chip element and an anti-stress circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. Bonding circuits and transmission circuits of the circuit layer are disposed on the chip mounting area and the circuit area respectively. The flip-chip element is disposed on the chip mounting area and includes bumps and a chip having a long side margin and conductive pads, the bumps are provided to connect the conductive pads and the bonding circuits. Anti-stress circuits of the anti-stress circuit layer are disposed on the chip mounting area and parallel to the long side margin of the chip, and the bumps are located between the anti-stress circuits and the long side margin of the chip.

公开(公告)号：US20220225496A1

公开(公告)日：2022-07-14

申请号：US17504635

申请日：2021-10-19

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Gwo-Shyan Sheu ,  Hsin-Hao Huang ,  Yu-Chen Ma ,  Chia-Hsin Yen

IPC: H05K1/02

Abstract: A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.

公开(公告)号：US20220104354A1

公开(公告)日：2022-03-31

申请号：US17227458

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/11 ,  H05K1/18

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.

公开(公告)号：US20220037238A1

公开(公告)日：2022-02-03

申请号：US17227470

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H05K1/18 ,  H01L23/00

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.