公开(公告)号：AU757905B2

公开(公告)日：2003-03-13

申请号：AU2058299

申请日：1999-01-15

Applicant: GEMPLUS CARD INT

Inventor： COOREMAN PASCAL ,  RAYON STEPHANE ,  GOMEZ BERTRAND

IPC: G06K19/10 ,  G06K7/00 ,  G07F7/10

公开(公告)号：AU3939101A

公开(公告)日：2001-09-24

申请号：AU3939101

申请日：2001-03-13

Applicant: GEMPLUS CARD INT ,  ST MICROELECTRONICS SA

Inventor： OVA FRANCIS DELL ,  RIZZO PIERRE ,  LHERMET FRANK ,  POIROT DOMINIQUE ,  RAYON STEPHANE ,  GOMEZ BERTRAND ,  LESSOILE NICOLE

IPC: H01L21/66 ,  H01L23/66

公开(公告)号：ZA9900572B

公开(公告)日：1999-10-05

申请号：ZA9900572

申请日：1999-01-26

Applicant: GEMPLUS CARD INT

Inventor： COOREMAN PASCAL ,  RAYON STEPHANE ,  GOMEZ BERTRAND

IPC: G06K19/10 ,  G06K7/00 ,  G07F7/10 ,  G06K ,  G07F ,  G11C

CPC classification number: G07F7/1008 ,  G06K7/0008 ,  G06Q20/341 ,  G07F7/084

公开(公告)号：FR2774196A1

公开(公告)日：1999-07-30

申请号：FR9800859

申请日：1998-01-27

Applicant: GEMPLUS CARD INT

Inventor： COOREMAN PASCAL ,  RAYON STEPHANE ,  GOMEZ BERTRAND

IPC: G06K7/00 ,  G07F7/10 ,  G06K19/10 ,  G06K19/073 ,  G06F12/16

Abstract: The card has input and output circuits (12,14) which are modified by a circuit (20) that allows reading and writing of memory by signals from a terminal (18) using an asynchronous communication protocol with verification of code integrity. The signals are analyzed (22) then directed to a register (26) and a data register (28) by a switch circuit (24), and sent via a transmission circuit (34).

公开(公告)号：ZA99572B

公开(公告)日：1999-10-05

申请号：ZA99572

申请日：1999-01-26

Applicant: GEMPLUS CARD INT

Inventor： COOREMAN PASCAL ,  RAYON STEPHANE ,  GOMEZ BERTRAND

IPC: G06K19/10 ,  G06K7/00 ,  G07F7/10 ,  G06K ,  G07F ,  G11C

公开(公告)号：FR2774195A1

公开(公告)日：1999-07-30

申请号：FR9800858

申请日：1998-01-27

Applicant: GEMPLUS CARD INT

Inventor： COOREMAN PASCAL ,  RAYON STEPHANE ,  GOMEZ BERTRAND

IPC: G06K19/07 ,  G06K19/073 ,  G06F13/38

Abstract: The microprocessor card (10) has an asynchronous communication device (40) between the reader contacts and the microprocessor. The communication device has an analysis circuit (34), a verification circuit (36) to validate pulse train integrity, a circuit to determine the characters in the pulse train and multiple registers (42,44,46) connected to the microprocessor.