公开(公告)号：EP2282348A2

公开(公告)日：2011-02-09

申请号：EP10171439.2

申请日：2010-07-30

Applicant: General Electric Company

Inventor： Losee, Peter Almern ,  Arthur, Stephen Daley ,  Brown, Dale Marius ,  Matocha, Kevin Sean ,  Rao, Ravinuthala Ramakrishna

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/24

CPC classification number: H01L29/7828 ,  H01L29/0623 ,  H01L29/0646 ,  H01L29/1608

Abstract: There are provided semiconductor structures (100) and devices (200) comprising silicon carbide (SiC) and methods for making the same. The structures (100) and devices (200) comprise a base or shielding layer (216), channel (218) and surface layer (220), all desirably formed via ion implantation. As a result, the structures and devices provided herein are hard, "normally off" devices, i.e., exhibiting threshold voltages of greater than about 3 volts.

Abstract translation: 提供了包括碳化硅（SiC）的半导体结构（100）和器件（200）及其制造方法。 结构（100）和装置（200）包括基底或屏蔽层（216），通道（218）和表面层（220），全部期望地通过离子注入形成。 结果，本文提供的结构和装置是硬的“常关”装置，即表现出大于约3伏的阈值电压。

公开(公告)号：EP2693469A3

公开(公告)日：2016-01-20

申请号：EP13178277.3

申请日：2013-07-26

Applicant: General Electric Company

Inventor： Michael, Joseph Darryl ,  Arthur, Stephen Daley

IPC: H01L23/04 ,  H01L21/50

CPC classification number: H01L23/04 ,  H01L21/50 ,  H01L29/1608 ,  H01L29/7802 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system includes a silicon carbide (SiC) semiconductor device (100) and a hermetically sealed packaging (130) enclosing the SiC semiconductor device. The hermetically sealed packaging is configured to maintain a particular atmosphere (132) near the SiC semiconductor device. Further, the particular atmosphere limits a shift in a threshold voltage of the SiC semiconductor device to less than 1 V during operation.

公开(公告)号：EP2551912A2

公开(公告)日：2013-01-30

申请号：EP12177404.6

申请日：2012-07-20

Applicant: General Electric Company

Inventor： Arthur, Stephen Daley ,  Matocha, Kevin ,  Sandvik, Peter ,  Stum, Zachary ,  Losee, Peter ,  McMahon, James

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/08

CPC classification number: H01L27/088 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7802

Abstract: In one embodiment, the invention comprises a silicon-carbide MOSFET comprising individual MOSFET cells. Each cell comprises a U-shaped well (228) (P type) and two parallel sources (260) (N type) formed within the well. A plurality of source rungs (262) (doped N) connect sources (260) at multiple locations. Regions between two rungs (262) comprise a body region (252) (P type). These features are formed on an N-type epitaxial layer (220), which is formed on an N-type substrate (216). A contact (290) extends across and contacts a plurality of source rungs (262) and body regions (252). Gate oxide and a gate contact overlie a leg of a well of a first cell and a leg of a well of a second adjacent cell, inverting the conductivity responsive to a gate voltage. A MOSFET comprises a plurality of these cells to attain a desired low channel resistance. The cell regions are formed using self-alignment techniques at several states of the fabrication process.

Abstract translation: 在一个实施例中，本发明包括包含单个MOSFET电池的碳化硅MOSFET。 每个单元包括形成在井内的U形孔（228）（P型）和两个平行源（260）（N型）。 在多个位置处多个源极（262）（掺杂的N）连接源（260）。 两个梯级（262）之间的区域包括主体区域（252）（P型）。 这些特征形成在形成在N型衬底（216）上的N型外延层（220）上。 接触件（290）跨越并接触多个源极（262）和主体区域（252）。 栅极氧化物和栅极接触覆盖在第二相邻电池的阱的第一电池和阱的阱的支路上，响应于栅极电压而反转电导率。 MOSFET包括多个这些单元以获得期望的低通道电阻。 在制造过程的几个状态下使用自对准技术形成单元区域。

公开(公告)号：EP2282348A3

公开(公告)日：2012-09-05

申请号：EP10171439.2

申请日：2010-07-30

Applicant: General Electric Company

Inventor： Losee, Peter Almern ,  Arthur, Stephen Daley ,  Brown, Dale Marius ,  Matocha, Kevin Sean ,  Rao, Ravinuthala Ramakrishna

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/16

CPC classification number: H01L29/7828 ,  H01L29/0623 ,  H01L29/0646 ,  H01L29/1608

Abstract: There are provided semiconductor structures (100) and devices (200) comprising silicon carbide (SiC) and methods for making the same. The structures (100) and devices (200) comprise a base or shielding layer (216), channel (218) and surface layer (220), all desirably formed via ion implantation. As a result, the structures and devices provided herein are hard, "normally off" devices, i.e., exhibiting threshold voltages of greater than about 3 volts.

公开(公告)号：EP1959472A3

公开(公告)日：2010-06-02

申请号：EP08101503.4

申请日：2008-02-12

Applicant: GENERAL ELECTRIC COMPANY

Inventor： Arthur, Stephen Daley ,  Elasser, Ahmed ,  Wright, Joshua Isaac ,  Subramanian, Kanakasabapthi ,  Keimel, Christopher Fred ,  Gowda, Arun Virupaksha

IPC: H01H59/00

CPC classification number: H01H59/0009 ,  H01H9/52 ,  H01L24/24 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49105 ,  H01L2924/00

Abstract: One embodiment of the invention comprises a MEMS structure further comprising: a MEMS device (240) having a first surface with one or more contact structures (244, 245 and 246) thereon connected to functional elements of the MEMS device (240), a dielectric layer (100) overlying the first surface defining openings therein through which the contact structures (244, 245 and 246) are exposed, a patterned metallization layer (254, 255 and 256) comprising conductive material extending from the contact structures (244, 245 and 246) through the openings in the dielectric layer (100) and onto a surface of the dielectric layer and a first heat sink (190) in thermal communication with the metallization layer (254, 255 and 256).

公开(公告)号：EP1959472A2

公开(公告)日：2008-08-20

申请号：EP08101503.4

申请日：2008-02-12

Applicant: General Electric Company

Inventor： Arthur, Stephen Daley ,  Elasser, Ahmed ,  Wright, Joshua Isaac ,  Subramanian, Kanakasabapthi ,  Keimel, Christopher Fred ,  Gowda, Arun Virupaksha

IPC: H01H59/00

CPC classification number: H01H59/0009 ,  H01H9/52 ,  H01L24/24 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  Y10T29/49105 ,  H01L2924/00

Abstract: One embodiment of the invention comprises a MEMS structure further comprising: a MEMS device (240) having a first surface with one or more contact structures (244, 245 and 246) thereon connected to functional elements of the MEMS device (240), a dielectric layer (100) overlying the first surface defining openings therein through which the contact structures (244, 245 and 246) are exposed, a patterned metallization layer (254, 255 and 256) comprising conductive material extending from the contact structures (244, 245 and 246) through the openings in the dielectric layer (100) and onto a surface of the dielectric layer and a first heat sink (190) in thermal communication with the metallization layer (254, 255 and 256).

Abstract translation: 本发明的一个实施例包括MEMS结构，进一步包括：具有在其上连接到MEMS器件（240）的功能元件的一个或多个接触结构（244,245和246）的第一表面上的MEMS装置（240），介电 层（100）。其中覆盖所述第一表面限定的开口，通过该接触结构（244,245和246）被暴露，图案化的金属化层（254，255和256）包括用导电材料从接触结构（244，245和扩展 246）通过在所述介电层（100）和到所述电介质层的表面和第一热沉（190）（与金属化层254，255和256）热连通的开口。