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公开(公告)号:US11881395B2
公开(公告)日:2024-01-23
申请号:US17644939
申请日:2021-12-17
Applicant: GlobalFoundries U.S. Inc.
Inventor: Judson R. Holt , Hong Yu , Alexander M. Derrickson
IPC: H01L29/735 , H01L29/08 , H01L29/66 , H01L29/10
CPC classification number: H01L29/735 , H01L29/0808 , H01L29/0821 , H01L29/1008 , H01L29/6625
Abstract: Embodiments of the disclosure provide a lateral bipolar transistor on a semiconductor fin and methods to form the same. A bipolar transistor structure according to the disclosure may include a doped semiconductor layer coupled to a base contact. A first semiconductor fin on the doped semiconductor layer may have a first doping type. An emitter/collector (E/C) material may be on a sidewall of an upper portion of the first semiconductor fin. The E/C material has a second doping type opposite the first doping type. The E/C material is coupled to an E/C contact.
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公开(公告)号:US20230062013A1
公开(公告)日:2023-03-02
申请号:US17644939
申请日:2021-12-17
Applicant: GlobalFoundries U.S. Inc.
Inventor: Judson R. Holt , Hong Yu , Alexander M. Derrickson
IPC: H01L29/735 , H01L29/08 , H01L29/10 , H01L29/66
Abstract: Embodiments of the disclosure provide a lateral bipolar transistor on a semiconductor fin and methods to form the same. A bipolar transistor structure according to the disclosure may include a doped semiconductor layer coupled to a base contact. A first semiconductor fin on the doped semiconductor layer may have a first doping type. An emitter/collector (E/C) material may be on a sidewall of an upper portion of the first semiconductor fin. The E/C material has a second doping type opposite the first doping type. The E/C material is coupled to an E/C contact.
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公开(公告)号:US11588044B2
公开(公告)日:2023-02-21
申请号:US17109464
申请日:2020-12-02
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Alexander M. Derrickson , Mankyu Yang , Richard F. Taylor, III , Jagar Singh , Alexander L. Martin
IPC: H01L29/739 , H03K17/60 , H01L29/10 , H01L29/06
Abstract: Embodiments of the disclosure provide a bipolar junction transistor (BJT) structure and related method. A BJT according to the disclosure may include a base over a semiconductor substrate. A collector is over the semiconductor substrate and laterally abuts a first horizontal end of the base. An emitter is over the semiconductor substrate and laterally abuts a second horizontal end of the base opposite the first horizontal end. A horizontal interface between the emitter and the base is smaller than a horizontal interface between the collector and the base.
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公开(公告)号:US20220173230A1
公开(公告)日:2022-06-02
申请号:US17109464
申请日:2020-12-02
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Alexander M. Derrickson , Mankyu Yang , Richard F. Taylor, III , Jagar Singh , Alexander L. Martin
IPC: H01L29/739 , H01L29/06 , H01L29/10 , H03K17/60
Abstract: Embodiments of the disclosure provide a bipolar junction transistor (BJT) structure and related method. A BJT according to the disclosure may include a base over a semiconductor substrate. A collector is over the semiconductor substrate and laterally abuts a first horizontal end of the base. An emitter is over the semiconductor substrate and laterally abuts a second horizontal end of the base opposite the first horizontal end. A horizontal interface between the emitter and the base is smaller than a horizontal interface between the collector and the base.
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公开(公告)号:US20240250158A1
公开(公告)日:2024-07-25
申请号:US18438882
申请日:2024-02-12
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Judson R. Holt , Vibhor Jain , Alexander M. Derrickson
IPC: H01L29/739 , H01L29/06 , H01L29/66
CPC classification number: H01L29/7393 , H01L29/0649 , H01L29/66325
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and a gate structure comprising a gate oxide and a gate control in a same channel region as the extrinsic base region.
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公开(公告)号:US11804542B2
公开(公告)日:2023-10-31
申请号:US17557176
申请日:2021-12-21
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Alexander M. Derrickson , Arkadiusz Malinowski , Jagar Singh , Mankyu Yang , Judson R. Holt
IPC: H01L29/737 , H01L29/165 , H01L29/66 , H01L29/10 , H01L29/08
CPC classification number: H01L29/7371 , H01L29/0817 , H01L29/0821 , H01L29/1004 , H01L29/165 , H01L29/66242
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to annular bipolar transistors and methods of manufacture. The structure includes: a substate material; a collector region parallel to and above the substrate material; an intrinsic base region surrounding the collector region; an emitter region above the intrinsic base region; and an extrinsic base region contacting the intrinsic base region.
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公开(公告)号:US20230290829A1
公开(公告)日:2023-09-14
申请号:US17804201
申请日:2022-05-26
Applicant: GlobalFoundries U.S. Inc.
Inventor: Peter Baars , Alexander M. Derrickson , Ketankumar Harishbhai Tailor , Zhixing Zhao , Judson R. Holt
IPC: H01L29/10 , H01L29/66 , H01L29/735
CPC classification number: H01L29/1004 , H01L29/66234 , H01L29/735
Abstract: Embodiments of the disclosure provide a bipolar transistor structure having a base with a varying horizontal width and methods to form the same. The bipolar transistor structure includes a first emitter/collector (E/C) layer on an insulator layer. A base layer is over the insulator layer. A spacer between the first E/C layer and the base layer. The base layer includes a lower base region, and the spacer is adjacent to the lower base region and the first E/C layer. An upper base region is on the lower base region and the spacer. A horizontal width of the upper base region is larger than a horizontal width of the lower base region.
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公开(公告)号:US20230223462A1
公开(公告)日:2023-07-13
申请号:US17657154
申请日:2022-03-30
Applicant: GlobalFoundries U.S. Inc.
Inventor: Hong Yu , Alexander M. Derrickson , Judson R. Holt
CPC classification number: H01L29/73 , H01L29/66234 , H01L29/0804 , H01L29/0821 , H01L29/1095 , H01L29/0653
Abstract: Embodiments of the disclosure provide a bipolar transistor structure including a semiconductor fin on a substrate. The semiconductor fin has a first doping type, a length in a first direction, and a width in a second direction perpendicular to the first direction. A first emitter/collector (E/C) material is adjacent a first sidewall of the semiconductor fin along the width of the semiconductor fin. The first E/C material has a second doping type opposite the first doping type. A second E/C material is adjacent a second sidewall of the semiconductor fin along the width of the semiconductor fin. The second E/C material has the second doping type. A width of the first E/C material is different from a width of the second E/C material.
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公开(公告)号:US20230075949A1
公开(公告)日:2023-03-09
申请号:US17550835
申请日:2021-12-14
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Jagar Singh , Alexander M. Derrickson , Alexander Martin
IPC: H01L29/735 , H01L29/423 , H01L29/45 , H01L29/10 , H01L29/08
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region composed of semiconductor material; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and an extrinsic base contact wrapping around the semiconductor material of the extrinsic base region.
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公开(公告)号:US20230064512A1
公开(公告)日:2023-03-02
申请号:US17456395
申请日:2021-11-24
Applicant: GlobalFoundries U.S. Inc.
Inventor: Vibhor Jain , John J. Pekarik , Alvin J. Joseph , Alexander M. Derrickson , Judson R. Holt
IPC: H01L29/735 , H01L29/08 , H01L29/15 , H01L29/10 , H01L29/66
Abstract: Embodiments of the disclosure provide a lateral bipolar transistor structure with a superlattice layer and methods to form the same. The bipolar transistor structure may have a semiconductor layer of a first single crystal semiconductor material over an insulator layer. The semiconductor layer includes an intrinsic base region having a first doping type. An emitter/collector (E/C) region may be adjacent the intrinsic base region and may have a second doping type opposite the first doping type. A superlattice layer is on the E/C region of the semiconductor layer. A raised E/C terminal, including a single crystal semiconductor material, is on the superlattice layer. The superlattice layer separates the E/C region from the raised E/C terminal.
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