BIPOLAR JUNCTION TRANSISTOR ARRAYS
    13.
    发明公开

    公开(公告)号:US20240170560A1

    公开(公告)日:2024-05-23

    申请号:US17990898

    申请日:2022-11-21

    CPC classification number: H01L29/735 H01L27/0623 H01L29/66871 H01L29/732

    Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate, and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor including a first collector in the substrate, a first emitter, and a first base layer. The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor including a second collector in the substrate, a second emitter, and a second base layer. The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.

    STRUCTURE HAVING DIFFERENT GATE DIELECTRIC WIDTHS IN DIFFERENT REGIONS OF SUBSTRATE

    公开(公告)号:US20230326924A1

    公开(公告)日:2023-10-12

    申请号:US17658914

    申请日:2022-04-12

    CPC classification number: H01L27/088 H01L29/42364 H01L21/823462

    Abstract: A structure and method of forming different high dielectric constant (high-K) gate dielectrics for different transistors on the same substrate, are disclosed. A first region includes a first transistor(s) on the substrate having a first gate structure having a first gate body over a first high-K gate dielectric. The first gate body and the first high-K gate dielectric have different widths defining a first width difference. A second region includes a second transistor(s) on the substrate having a second gate structure having a second gate body over a second high-K gate dielectric. The second gate body and the second high-K gate dielectric have different widths defining a second width difference. The first width difference is different than the second width difference, i.e., amongst transistors in the different regions. The different gate dielectric widths improve control of overlap capacitance of the transistors without increasing dopants or an annealing temperature.

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