MTL (MERGED TRANSISTOR LOGIC) OR I2L (INTEGRATED INJECTION LOGIC) CIRCUITRY

    公开(公告)号:CA1079819A

    公开(公告)日:1980-06-17

    申请号:CA247403

    申请日:1976-03-05

    Applicant: IBM

    Abstract: MTL (MERGED TRANSISTOR LOGIC) OR I2L (INTEGRATED INJECTION LOGIC) CIRCUITRY The disclosure is directed to Merged Transistor Logic (MTL) circuitry or Integrated Injection Logic (I2L) circuitry. More specifically the disclosure relates to a semiconductor arrangement for the basic components of a highly integratable, logic semiconductor circuit concept predicated on multi-collector inverter transistors which are fed by means of a carrier injection into their emitter/base zones. Binary inputs are provided to the integrated logic circuitry and combined logically within the circuitry to provide a combined logical output. The circuitry consists of a plurality of transistors of both a first and second conductivity type having input terminals and common connection means to a plurality of output terminal representative of the logical output.

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