METHOD AND SYSTEM FOR SPECULATIVELY SUPPLYING CACHE MEMORY DATA INSIDE DATA PROCESSING SYSTEM

    公开(公告)号:JPH10301851A

    公开(公告)日:1998-11-13

    申请号:JP9600798

    申请日:1998-04-08

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide improved method and system for sharing cache memory data by reading requested data from a cache memory inside a processor before composite responses are returned from all the processors inside a data processing system to the processor. SOLUTION: The data processing system is provided with at least one CPU 11a-11n and provided with at least one each of primary cache 12a 12n and secondary cache 13a-13n and one high performance I/O device 16a-16n. In response to the request of the data by the high performance I/O device 16a-16n inside the data processing system, an intervention response is issued from the CPU 11a-11n provided with the requested data inside the data processing system. Then, the requested data are read from the secondary cache 13a-13n inside the CPU 11a-11n before the composite response is returned from all the CPUs 11a-11n inside the data processing system to the CPU 11a-11n.

    METHOD AND SYSTEM FOR SHARING AND INTERVENING CACHE LINE IN SHARED STATE OF SMP BUS

    公开(公告)号:JPH10289155A

    公开(公告)日:1998-10-27

    申请号:JP7870898

    申请日:1998-03-26

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To improve the memory waiting time related to a reading type operation by making a requester processor issue the messages to try to read the unchanged sharing copies of value of the 1st and 2nd caches and then making one of caches transfer an answer to show that it can supply those cache value. SOLUTION: The value are loaded to at least 1st and 2nd caches from the addresses of a memory device, and the marks are added to both caches to show that they include the unchanged sharing copies of the value. Then a requester processor issues a message to show to try to read these value from the addresses of the memory device, and one of both caches transfers an answer to show that it can supply the value. Under such conditions, a protocol including the R which designates a block that is latest referred to is used in addition to the changing, exclusive, shared and invalid states in order to confirm the cache that owns the unchanged value.

    METHOD AND DEVICE FOR SHARING CACHE LINE IN EXCLUSIVE STATE OF SMP BUS

    公开(公告)号:JPH10289154A

    公开(公告)日:1998-10-27

    申请号:JP7869098

    申请日:1998-03-26

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To improve the memory waiting time caused by a reading type operation by making a requester processor issue a message to try to read an unchanged copy of the value that is exclusively held in a cache and them making the cache transfer an answer to show that it can supply the value. SOLUTION: The value is loaded from an address of a memory device to the 1st one of plural caches which are related to the processors of a computer system, and a mark is added to the cache to show that it includes an unchanged copy of the value held exclusively. Then a requester processor issues a message to show to try to read the value from an address of a memory device, and the 1st cache transfers an answer to show that it can supply the value. Under such conditions, a protocol including the R which designates a block that is latest referred to is used in addition to the changing, exclusive, shared and invalid states in order to confirm the cache that owns the unchanged value.

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