公开(公告)号：JPH10289156A

公开(公告)日：1998-10-27

申请号：JP7872198

申请日：1998-03-26

Applicant: IBM

Inventor： RAVI KUMER ARIMIRI ,  JOHN STEPHEN DODDSON ,  KAISER JOHN MICHAEL ,  JERRY DON LEWIS

IPC: G06F15/16 ,  G06F12/08 ,  G06F15/163

Abstract: PROBLEM TO BE SOLVED: To improve the memory waiting time related to a reading type operation by making a requester processor issue a message to try to read an unchanged copy of the value that is latest read and then making a specific cache transfer an answer to show that it can supply the value. SOLUTION: The value are loaded to plural caches from the addresses of a memory device, and a specific cache including an unchanged copy of the value that is latest read is identified among those caches and marked. At the same time, other caches including the unchanged sharing copies are also copied. Then a requester processor issues a message to try to read those value from the addresses of the memory device, and the specific cache transfers an answer to show that it can supply these value. Under such conditions, a protocol including the R which designates a block that is latest read is used in addition to the changing, exclusive, shared and invalid states in order to confirm the cache that owns the unchanged value.

公开(公告)号：JPH10283261A

公开(公告)日：1998-10-23

申请号：JP5938598

申请日：1998-03-11

Applicant: IBM

Inventor： RAVI KUMER ARIMIRI ,  JOHN STEPHEN DODDSON ,  JERRY DON LEWIS ,  DEREK EDWARD WILLIAMS

IPC: G06F12/08 ,  G06F12/12 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To provide an improved method for processing of cache entry reservation in a multi-processor computer system. SOLUTION: Generally, a method to store a value in a cache of a processor is provided with a stage where a first value is loaded into a first block of the cache, a stage where it is indicated that the first value is to be reserved, a stage where at least one value is loaded into another block of the cache, a stage where a selected block is discriminated as a block other than the first block to drive out the selected block of the cache in the case that it is indicated still that the first value is reserved, and a stage where a new value is loaded into the selected block after the driving-out stage.

公开(公告)号：JP2002259211A

公开(公告)日：2002-09-13

申请号：JP2002031401

申请日：2002-02-07

Applicant: IBM

Inventor： RAVI KUMER ARIMIRI ,  DODSON JOHN STEVEN ,  GUY LYNN GUTHRIE

IPC: G06F12/08

Abstract: PROBLEM TO BE SOLVED: To allow an upper level (L1) cache to maintain coherency in a cache hierarchy of a processing unit of a computer system including a split instruction/ data cache. SOLUTION: In a store-through type L1 data cache, each processing unit has a lower level (L2) cache. When the lower level cache receives a cache operation (i.e., a store operation or a snooped kill) requiring invalidation of a program instruction in the L1 instruction cache, the L2 cache sends an invalidation transaction (e.g. icbi) to the instruction cache. The L2 cache is fully inclusive of both instructions and data.

公开(公告)号：JPH10289155A

公开(公告)日：1998-10-27

申请号：JP7870898

申请日：1998-03-26

Applicant: IBM

Inventor： RAVI KUMER ARIMIRI ,  JOHN STEPHEN DODDSON ,  KAISER JOHN MICHAEL ,  JERRY DON LEWIS

IPC: G06F15/16 ,  G06F12/08 ,  G06F15/163

Abstract: PROBLEM TO BE SOLVED: To improve the memory waiting time related to a reading type operation by making a requester processor issue the messages to try to read the unchanged sharing copies of value of the 1st and 2nd caches and then making one of caches transfer an answer to show that it can supply those cache value. SOLUTION: The value are loaded to at least 1st and 2nd caches from the addresses of a memory device, and the marks are added to both caches to show that they include the unchanged sharing copies of the value. Then a requester processor issues a message to show to try to read these value from the addresses of the memory device, and one of both caches transfers an answer to show that it can supply the value. Under such conditions, a protocol including the R which designates a block that is latest referred to is used in addition to the changing, exclusive, shared and invalid states in order to confirm the cache that owns the unchanged value.

公开(公告)号：JPH10289154A

公开(公告)日：1998-10-27

申请号：JP7869098

申请日：1998-03-26

Applicant: IBM

Inventor： RAVI KUMER ARIMIRI ,  JOHN STEPHEN DODDSON ,  KAISER JOHN MICHAEL ,  JERRY DON LEWIS

IPC: G06F15/16 ,  G06F12/08 ,  G06F15/163

Abstract: PROBLEM TO BE SOLVED: To improve the memory waiting time caused by a reading type operation by making a requester processor issue a message to try to read an unchanged copy of the value that is exclusively held in a cache and them making the cache transfer an answer to show that it can supply the value. SOLUTION: The value is loaded from an address of a memory device to the 1st one of plural caches which are related to the processors of a computer system, and a mark is added to the cache to show that it includes an unchanged copy of the value held exclusively. Then a requester processor issues a message to show to try to read the value from an address of a memory device, and the 1st cache transfers an answer to show that it can supply the value. Under such conditions, a protocol including the R which designates a block that is latest referred to is used in addition to the changing, exclusive, shared and invalid states in order to confirm the cache that owns the unchanged value.