Abstract:
Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache memory reserved for storing such address translation information for faster access by a CPU. This way, the CPU can identify the subset of address translation information stored in the cache.
Abstract:
PROBLEM TO BE SOLVED: To provide a thermal management solution for guaranteeing real-time use nature even in a temperature condition which requires throttling of a processor. SOLUTION: A computer implemented method, a data processing system and the processor are provided for thermal throttling logic. A sensed temperature value representing a current temperature of a unit associated with a digital thermal sensor in an integrated circuit is received from the digital thermal sensor. The sensed temperature is reported as the current temperature in a status register. The unit in the integrated circuit is throttled in response to the current temperature exceeding a first predetermined value. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To reduce the number of envelope retransmissions in a system for sending an envelope and sending back an envelope. SOLUTION: The present invention provides for sending an envelope and sending back an envelope. A transmitter is configured to send an envelope. A receiver is coupled to the transmitter, wherein the receiver is configured to receive the envelope and generate a reply envelope. A send buffer is coupled to the transmitter, and a receiving buffer is coupled to the receiver. A retry timer is coupled to the transmitter, wherein the retry timer is configured to be reseted, upon the receipt of the reply envelope correlated to the transmit envelope. The transmitter is configured to retransmit an envelope, if the transmitter does not receive a corresponding reply envelope within a selected time period as determined by the retry timer. This leads to a decrease in the total number of envelopes, that are transmitted from both the transmitter and the receiver. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a method and a system for providing cache management commands in a system supporting a DMA mechanism and caches. SOLUTION: A DMA mechanism is set up by a processor. Software running on the processor generates cache management commands. The DMA mechanism carries out the commands, thereby enabling the software program management of the caches. The commands include commands for writing data to the cache, loading data from the cache, and for marking data in the cache as no longer needed. The cache can be a system cache or a DMA cache. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
A method, an apparatus, and a computer program are provided for controlling memory access. Direct Memory Access (DMA) units have become commonplace in a number of bus architectures. However, managing limited system resources has become a challenge with multiple DMA units. In order to mange the multitude of commands generated and preserve dependencies, embedded flags in commands or a barrier command are used. These operations then can control the order in which commands are executed so as to preserve dependencies.
Abstract:
PROBLEM TO BE SOLVED: To provide a system and a method for communicating command parameters between a processor and a memory flow controller. SOLUTION: This application utilizes a channel interface as a main mechanism for communication between the processor and the memory flow controller. The channel interface provides a channel for executing communication with, for instance, a processor facility, a memory flow control facility, a machine status register, and an external processor interrupt facility. When data to be read from a corresponding register by a blocking channel are not usable or there is no writing space in the corresponding register, the processor is brought into a low-power "stall" state. When the data are made usable or a space is released, the processor is automatically called via communication on the blocking channel. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide authentication of either code or data or both, and protected execution environments. SOLUTION: For authentication of code or data, a local storage is dynamically divided and division cancelled. The local storage is divided into an isolated section and a non-isolated section. The code or the data are loaded in the isolated section. Either the code or the data are authenticated in the isolated section of the local storage. After the authentication, the code is executed. After the execution, a memory within the isolated section of an attached processor unit, and the attached processor unit performs division cancellation with the isolated section within the local storage. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a management system and a method for streaming data in a cache. SOLUTION: A computer system 100 comprises: a processor 102; the cache 104; and a system memory 110. The processor 102 issues a data request for the streaming data. The streaming data has one or more small data portions. The system memory 110 has a specific area for storing the streaming data. The cache has a predefined area locked for the streaming data and is connected to a cache controller which is in communication with a processor 106 and the system memory 110. When at least one small data portion for the streaming data is not found in the predefined area of the cache, the small data portion is transferred to the predefined area of the cache 104 from the specific area of the system memory 110. COPYRIGHT: (C)2004,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To eliminate the necessity of a high-performance graphics subsystem by branching graphics inplementation between a host computer and a graphics subsystem. SOLUTION: The graphics subsystem of a digital computer system 10 is composed of a graphics adapter 20. A host system 10A is provided with a memory controller 30 mutually connected with a main processor 11 and a main memory 12. This controller is provided for controlling the processing and storage of graphics information related to picture elements, which exist in the main memory 12, to be displayed. Namely, the memory controller 30 generates masked direct frame buffer access data structure, the host system 10A and the graphics subsystem are mutually connected through a bus 16, and this data structure is trarnsmitted from the host system 10A to the graphics subsystem.
Abstract:
PROBLEM TO BE SOLVED: To provide a thermal management solution for guaranteeing real-time use nature even in a temperature condition which requires throttling of a processor. SOLUTION: A computer implemented method, a data processing system and the processor are provided for thermal throttling control for testing of real-time software. At least one thermal control setting is received. A thermal management system is set to a test mode using the at least one thermal control setting. The test mode indicates thermal throttling control using the thermal control setting. The real-time software is executed under the test mode, and a test is performed as to whether a real-time deadline associated with the real-time software is met under the test mode. At least one thermal control setting is recorded as a passing thermal control setting in response to the real-time software meeting the real-time deadline. COPYRIGHT: (C)2008,JPO&INPIT