公开(公告)号：HU0303965A2

公开(公告)日：2004-03-01

申请号：HU0303965

申请日：2002-04-17

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  MAGERLEIN JOHN HAROLD

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/04 ,  H01L23/538

Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.