公开(公告)号：WO02086971A3

公开(公告)日：2003-02-27

申请号：PCT/US0212207

申请日：2002-04-17

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  MAGERLEIN JOHN HAROLD

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/04 ,  H01L23/538 ,  H01L21/48 ,  H01L23/14

CPC classification number: H01L23/49827 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.

Abstract translation: 具有导电通孔的半导体或介电晶片用作集成电路封装结构中的基板，其中高密度片间和芯片间接触和布线位于其上安装集成电路的基板面上，以及外部信号和电源电路 通过相对面接触。 使用诸如硅的衬底允许使用本领域可获得的常规硅工艺来提供高布线密度以及集成电路中任何硅芯片的热膨胀系数的匹配。 使用通过基板的通孔允许离开硅衬底的高密度连接并且为功率和信号的连接提供短路径。

公开(公告)号：HU0104678A2

公开(公告)日：2002-03-28

申请号：HU0104678

申请日：1999-11-29

Applicant: IBM

Inventor： BUDD RUSSELL ALAN ,  CHIU GEORGE LIANG-TAI ,  CORDES MICHAEL JAMES ,  CORDES STEVEN ALLEN ,  DOYLE JAMES PATRICK

IPC: H01J11/02 ,  G02B5/20 ,  G02F1/1335 ,  G03F7/00 ,  G09F9/00 ,  G09F9/30 ,  G02F1/133

Abstract: Three component color sub-pixel element areas of red,green and blue, are serially formed in an overall pixel area, on a transparent substrate, and after each individual color sub pixel element formation, a layer of protective transparent material is applied over the individual sub pixel element and the pixel area before formation of the next sub pixel element. The protective layers render the sub pixel elements unaffected by the processing of subsequent sub pixel members where such conditions as high temperature curing, hardening agents or hardening processes are involved, whereby advantages are achieved in manufacturability, reliability, yield, cost, and throughput.

公开(公告)号：AU2002256271A1

公开(公告)日：2002-11-05

申请号：AU2002256271

申请日：2002-04-17

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  MAGERLEIN JOHN HAROLD

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/04 ,  H01L23/538 ,  H01L23/14 ,  H01L21/48

Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.

公开(公告)号：DE69611560T2

公开(公告)日：2001-06-21

申请号：DE69611560

申请日：1996-02-13

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  CIPOLLA THOMAS MARIO ,  DOANY FUAD ELIAS ,  DOVE DEREK BRIAN ,  ROSENBLUTH ALAN EDWARD ,  SINGH RAMA NAND ,  WILCZYNSKI JANUSZ STANISLAW

IPC: G02F1/13 ,  G02F1/1335 ,  H04N5/74 ,  H04N9/31

Abstract: An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display. In particular, the present invention includes a color splitting prism assembly having a plurality of output faces through which a separate color component is directed to be reflected by a respective light valve. Color absorbing filters are disposed at each of the output faces to absorb the color components not corresponding to the color directed through each output face.

公开(公告)号：DE69611561D1

公开(公告)日：2001-02-22

申请号：DE69611561

申请日：1996-02-13

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  CIPOLLA THOMAS M ,  DOANY FUAD E ,  DOVE DEREK B ,  ROSENBLUTH ALAN E ,  SINGH RAMA N ,  WILCZYNSKI JANUSZ S

IPC: G02F1/13 ,  G02F1/1335 ,  H04N5/74 ,  H04N9/31

Abstract: An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display. The illumination system includes a light tunnel having a cross-sectional shape corresponding to the geometrical shape of the spacial light modulator to optimize the amount of light projected onto the screen.

公开(公告)号：CZ20011889A3

公开(公告)日：2002-02-13

申请号：CZ20011889

申请日：1999-11-29

Applicant: IBM

Inventor： BUDD RUSSELL ALAN ,  CHIU GEORGE LIANG-TAI ,  CORDES MICHAEL JAMES ,  CORDES STEVEN ALLEN ,  DOYLE JAMES PATRICK

IPC: H01J11/02 ,  G02B5/20 ,  G02F1/1335 ,  G03F7/00 ,  G09F9/00 ,  G09F9/30

Abstract: Three component color sub-pixel element areas of red,green and blue, are serially formed in an overall pixel area, on a transparent substrate, and after each individual color sub pixel element formation, a layer of protective transparent material is applied over the individual sub pixel element and the pixel area before formation of the next sub pixel element. The protective layers render the sub pixel elements unaffected by the processing of subsequent sub pixel members where such conditions as high temperature curing, hardening agents or hardening processes are involved, whereby advantages are achieved in manufacturability, reliability, yield, cost, and throughput.

公开(公告)号：DE69611560D1

公开(公告)日：2001-02-22

申请号：DE69611560

申请日：1996-02-13

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  CIPOLLA THOMAS MARIO ,  DOANY FUAD ELIAS ,  DOVE DEREK BRIAN ,  ROSENBLUTH ALAN EDWARD ,  SINGH RAMA NAND ,  WILCZYNSKI JANUSZ STANISLAW

IPC: G02F1/13 ,  G02F1/1335 ,  H04N5/74 ,  H04N9/31

Abstract: An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display. In particular, the present invention includes a color splitting prism assembly having a plurality of output faces through which a separate color component is directed to be reflected by a respective light valve. Color absorbing filters are disposed at each of the output faces to absorb the color components not corresponding to the color directed through each output face.

公开(公告)号：CA2352168A1

公开(公告)日：2000-06-08

申请号：CA2352168

申请日：1999-11-29

Applicant: IBM

Inventor： CORDES MICHAEL JAMES ,  BUDD RUSSELL ALAN ,  CHIU GEORGE LIANG-TAI ,  CORDES STEVEN ALLEN ,  DOYLE JAMES PATRICK

IPC: H01J11/02 ,  G02B5/20 ,  G02F1/1335 ,  G03F7/00 ,  G09F9/00 ,  G09F9/30

Abstract: Three component color sub-pixel element areas (10, 12, 15) of red, green and blue, are serially formed in an overall pixel area (9), on a transparent substrate (2), and after each individual color sub pixel element formation, a layer of protective transparent material (11, 14, 16) is applied over the individual sub pixel element (10, 12, 15) and the pixel area before formatio n of the next sub pixel element. The protective layers render the sub pixel elements unaffected by the processing of subsequent sub pixel members where such conditions as high temperature curing, hardening agents or hardening processes are involved, whereby advantages are achieved in manufacturability , reliability, yield, cost, and throughput.

公开(公告)号：GB2324400A

公开(公告)日：1998-10-21

申请号：GB9807011

申请日：1998-04-02

Applicant: IBM

Inventor： BUDD RUSSELL ALAN ,  CHIU GEORGE LIANG-TAI ,  PEARSON DALE JONATHAN

IPC: G02F1/1334 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/136

Abstract: A method and structure for a display with reduced size pixels retains the transmissive approach which enables continued use of the least expensive transmission optics available. Back-end-of-the-line vertical cells are built on top of the row and column x, y lines of the pixels. In a PDLC type display embodiment each vertical cell is filled with PDLC which operates in a normally black mode known as the PDLC reverse mode. When the pixel control voltage is set ON, the liquid crystal is perpendicular to the light path resulting in a light pass through providing a bright state. When the control voltage is set OFF, the liquid crystals are randomly oriented, only the scattered light goes through the cell, so the pixel is in its OFF state. PDLC used here has two advantages. Firstly, the PDLC requires no rubbing. It is difficult to rub individual cell walls. Secondly, the use of both polarisations by the PDLC increases its luminous efficiency. Various embodiments are described for implementing vertical active electrodes and common ground electrodes. Advantages are described for employing the vertical electrodes with various implementations of a hidden storage capacitor.

公开(公告)号：PL368078A1

公开(公告)日：2005-03-21

申请号：PL36807802

申请日：2002-04-17

Applicant: IBM

Inventor： CHIU GEORGE LIANG-TAI ,  MAGERLEIN JOHN HAROLD

IPC: H01L25/18 ,  H01L23/498 ,  H01L25/04 ,  H01L23/38

Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.