公开(公告)号：GB2579754B

公开(公告)日：2020-12-02

申请号：GB202004608

申请日：2018-08-24

Applicant: IBM

Inventor： LOKESH GUPTA ,  KEVIN JOHN ASH ,  KYLER ANDERSON ,  MATTHEW JOSEPH KALOS

IPC: G06F12/06 ,  G06F12/00

Abstract: A cache hit is generated, in response to receiving an input/output (I/O) command over a bus interface. An update for a metadata track is stored in a buffer associated with a central processing unit (CPU) that processes the I/O command, in response to generating the cache hit. The metadata track is asynchronously updated from the buffer with the stored update for the metadata track in the buffer.

公开(公告)号：GB2578080A

公开(公告)日：2020-04-15

申请号：GB202002167

申请日：2018-07-19

Applicant: IBM

Inventor： KYLER ANDERSON ,  KEVIN JOHN ASH ,  MATTHEW JOSEPH KALOS ,  BETH ANN PETERSON ,  LOKESH MOHAN GUPTA

IPC: G06F12/0871 ,  G06F3/06

Abstract: Provided are a computer program product; system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.

公开(公告)号：SG112105A1

公开(公告)日：2005-06-29

申请号：SG200407446

申请日：2004-11-17

Applicant: IBM

Inventor： JAMES CHIEN-CHIUNG CHEN ,  BRIAN JEFFREY CORCORAN ,  MATTHEW JOSEPH KALOS ,  RICARDO SEDILLOS PADILLA

IPC: G06K19/07 ,  G06F9/00 ,  G06F9/445 ,  G06F11/00 ,  G06F13/28

Abstract: An apparatus, system, and method are disclosed for fastload code update on a communications adapter. The apparatus includes an image load module, a memory initialization module, and an image overlay module. The image load module is configured to load a copy of a new code image in a memory on the communications adapter. The memory also concurrently stores a copy of an old code image used by the communications adapter. The memory initialization module is configured to invoke the new code image to perform a memory initialization operation. The memory initialization module may perform the memory initialization operation concurrently with ongoing I/O requests possibly accepted, but not necessarily processed, by the old code image. The image overlay module is configured to overlay the old code image with the new code image. The fastload code update minimizes the time that the communications adapter is off-line to overlay the old code image with the new code image and reinitialize the communications adapter.