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11.发明专利
公开(公告)号：SG45151A1
公开(公告)日：1998-01-16
申请号：SG1996000711
申请日：1990-05-16
Applicant: IBM
Inventor： DINWIDDIE JOHN MONROE JR , GRICE LONNIE EDWARD , LOFFREDO JOHN MARIO , SANDERSON KENNETH RUSSELL , BAKER ERNEST DYSART , SUAREZ GUSTAVO ARMANDO
IPC: G06F9/46 , G06F9/50 , G06F11/16 , G06F12/02 , G06F13/18 , G06F15/16 , G06F15/167 , G06F15/177
Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors dirertly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
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公开(公告)号：AT161341T
公开(公告)日：1998-01-15
申请号：AT90305310
申请日：1990-05-16
Applicant: IBM
Inventor： FREEMAN BOBBY JOE , DINWIDDIE JOHN MONROE JR , GRICE LONNIE EDWARD , LOFFREDO JOHN MARIO , SANDERSON KENNETH RUSSELL , SUAREZ GUSTAVO ARMANDO
Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.
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公开(公告)号：CA2059928C
公开(公告)日：1996-08-06
申请号：CA2059928
申请日：1992-01-23
Applicant: IBM
Inventor： DINWIDDIE JOHN MONROE JR , FREEMAN BOBBY JOE , MICALLEF THOMAS JOHN , SUAREZ GUSTAVO ARMANDO , WILKIE BRUCE JAMES
Abstract: A multimedia solution is presented which allows a multimedia architecture to be implemented on an existing computer system. According to the invention, an expansion unit which incorporates a multimedia architecture is provided. The expansion unit is connected to an existing computer system via an expansion slot of an I/O bus of the existing computer as well as via a display device output terminal of the computer. The expansion unit is also connected to a display device. Accordingly, the expansion unit controls the presentation which is provided on the display device.
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公开(公告)号：CA2055037C
公开(公告)日：1996-06-25
申请号：CA2055037
申请日：1991-11-06
Applicant: IBM
Inventor： SUAREZ GUSTAVO ARMANDO
IPC: G06F13/42 , G06F3/14 , G06F13/374 , G09G1/16 , G09G5/14 , G06F13/366 , G06F13/20 , G06F13/36
Abstract: The invention is an N-bit arbitration circuit which includes N bit subcircuits, each of which provides a single bit output signal of an N-bit arbitration signal. The bit subcircuits include a more significant bit subcircuit and a least significant bit subcircuit. The more significant bit subcircuit includes a gate, which receives a more significant bit priority signal and an arbitration enable signal and provides a more significant bit of the N-bit arbitration signal, and a pipeline circuit, which receives the more significant bit priority signal, the arbitration enable signal and the more significant bit and provides a pipelined arbitration enable signal based upon the more significant bit priority signal, the arbitration enable signal and the more significant bit. The least significant bit subcircuit includes a gate, which receives a least significant bit priority signal and the pipelined arbitration enable signal and provides a least significant bit output signal of the N-bit arbitration circuit output signal, and a source enable circuit, which receives the least significant bit arbitration indication signal and the pipelined arbitration enable signal and provides a source enable signal based upon the least significant bit arbitration indication signal and the pipelined arbitration signal.
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公开(公告)号：BR9502919A
公开(公告)日：1996-03-05
申请号：BR9502919
申请日：1995-06-23
Applicant: IBM
Inventor： BAKER ROBERT GROVER , KETTLER KEVIN , SUAREZ GUSTAVO ARMANDO , UPLINGER KENNETH ALLEN , FLATTERY CANDACE JOY
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18 , H04N5/30
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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Patent Agency Ranking
公开(公告)号：CA2009765C
公开(公告)日：1996-01-02
申请号：CA2009765
申请日：1990-02-07
Applicant: IBM
Inventor： BAKER ERNEST DYSART , DINWIDDIE JOHN MONROE JR , GRICE LONNIE EDWARD , JOYCE JAMES MAURICE , LOFFREDO JOHN MARIO , SANDERSON KENNETH RUSSELL , SUAREZ GUSTAVO ARMANDO
IPC: G06F11/18 , G06F11/00 , G06F11/10 , G06F11/16 , G06F11/20 , G06F15/16 , G06F15/173 , G06F15/177
Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs execute their respective Operating Systems in a single system environment without significant rewriting of either operating system: Neither operating system is aware of the other operating system nor the other processor pairs.
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公开(公告)号：DE69113241D1
公开(公告)日：1995-10-26
申请号：DE69113241
申请日：1991-11-20
Applicant: IBM
Abstract: An information handling apparatus for transferring and composing image signals for display including a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source. The selective access enables composition of the independent image signal in response to control information; the composition enables real time display of a composed image signal.
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公开(公告)号：IN191489B
公开(公告)日：2003-12-06
申请号：IN422DE1995
申请日：1995-03-13
Applicant: IBM
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公开(公告)号：DE69515087T2
公开(公告)日：2000-09-14
申请号：DE69515087
申请日：1995-07-14
Applicant: IBM
Inventor： BAKER ROBERT GROVER , FLATTERY FREEDENBURG CANDACE J , KETTLER KEVIN , SUAREZ GUSTAVO ARMANDO , UPLINGER KENNETH ALLEN
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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公开(公告)号：DE69515087D1
公开(公告)日：2000-03-23
申请号：DE69515087
申请日：1995-07-14
Applicant: IBM
Inventor： BAKER ROBERT GROVER , FLATTERY FREEDENBURG CANDACE J , KETTLER KEVIN , SUAREZ GUSTAVO ARMANDO , UPLINGER KENNETH ALLEN
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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