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公开(公告)号：AT120867T
公开(公告)日：1995-04-15
申请号：AT90309934
申请日：1990-09-11
Applicant: IBM
Inventor： CAPPS LOUIS BENNIE , FORSTER JIMMY GRANT , PRICE WILLIAM EVERETT , RUPE ROBERT WILLIAM , UPLINGER KENNETH ALLEN
Abstract: A personal computer has two memory banks (12,14) respectively connected to two parity check units (16,18) operative to detect parity errors. Upon doing so, each unit (16,18) feeds a parity error signal to a separate latch (22,24). The latches (22,24) are connected to a logic circuit (26) which is in turn connected to an interrupt controller (34) that initiates an interrupt (36) when a parity error occurs. One latch (22) is further connected to a check bit (41) of a register (40) of an I/O port (38) and the check bit (41) is set by the one latch (22). An interrupt handler reads the register and provides messages indicating which memory bank (12,14) caused the parity error.
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公开(公告)号：DE69018365T2
公开(公告)日：1995-10-12
申请号：DE69018365
申请日：1990-09-11
Applicant: IBM
Inventor： CAPPS LOUIS BENNIE , FORSTER JIMMY GRANT , PRICE WILLIAM EVERETT , RUPE ROBERT WILLIAM , UPLINGER KENNETH ALLEN
Abstract: A personal computer has two memory banks (12,14) respectively connected to two parity check units (16,18) operative to detect parity errors. Upon doing so, each unit (16,18) feeds a parity error signal to a separate latch (22,24). The latches (22,24) are connected to a logic circuit (26) which is in turn connected to an interrupt controller (34) that initiates an interrupt (36) when a parity error occurs. One latch (22) is further connected to a check bit (41) of a register (40) of an I/O port (38) and the check bit (41) is set by the one latch (22). An interrupt handler reads the register and provides messages indicating which memory bank (12,14) caused the parity error.
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公开(公告)号：DE4032571A1
公开(公告)日：1991-05-02
申请号：DE4032571
申请日：1990-10-13
Applicant: IBM
Inventor： CAPPS JUN LOUIS BENNIE , FORSTER JIMMY GRANT , PRICE WILLIAM EVERETT , RUPE ROBERT WILLIAM , UPLINGER KENNETH ALLEN
Abstract: A personal computer has two memory banks (12,14) respectively connected to two parity check units (16,18) operative to detect parity errors. Upon doing so, each unit (16,18) feeds a parity error signal to a separate latch (22,24). The latches (22,24) are connected to a logic circuit (26) which is in turn connected to an interrupt controller (34) that initiates an interrupt (36) when a parity error occurs. One latch (22) is further connected to a check bit (41) of a register (40) of an I/O port (38) and the check bit (41) is set by the one latch (22). An interrupt handler reads the register and provides messages indicating which memory bank (12,14) caused the parity error.
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公开(公告)号：HK71596A
公开(公告)日：1996-05-03
申请号：HK71596
申请日：1996-04-25
Applicant: IBM
Inventor： CAPPS LOUIS BENNIE , FORSTER JIMMY GRANT , PRICE WILLIAM EVERETT , RUPE ROBERT WILLIAM , UPLINGER KENNETH ALLEN
Abstract: A personal computer has two memory banks (12,14) respectively connected to two parity check units (16,18) operative to detect parity errors. Upon doing so, each unit (16,18) feeds a parity error signal to a separate latch (22,24). The latches (22,24) are connected to a logic circuit (26) which is in turn connected to an interrupt controller (34) that initiates an interrupt (36) when a parity error occurs. One latch (22) is further connected to a check bit (41) of a register (40) of an I/O port (38) and the check bit (41) is set by the one latch (22). An interrupt handler reads the register and provides messages indicating which memory bank (12,14) caused the parity error.
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公开(公告)号：BR9502919A
公开(公告)日：1996-03-05
申请号：BR9502919
申请日：1995-06-23
Applicant: IBM
Inventor： BAKER ROBERT GROVER , KETTLER KEVIN , SUAREZ GUSTAVO ARMANDO , UPLINGER KENNETH ALLEN , FLATTERY CANDACE JOY
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18 , H04N5/30
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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Patent Agency Ranking
公开(公告)号：DE69515087T2
公开(公告)日：2000-09-14
申请号：DE69515087
申请日：1995-07-14
Applicant: IBM
Inventor： BAKER ROBERT GROVER , FLATTERY FREEDENBURG CANDACE J , KETTLER KEVIN , SUAREZ GUSTAVO ARMANDO , UPLINGER KENNETH ALLEN
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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公开(公告)号：DE69515087D1
公开(公告)日：2000-03-23
申请号：DE69515087
申请日：1995-07-14
Applicant: IBM
Inventor： BAKER ROBERT GROVER , FLATTERY FREEDENBURG CANDACE J , KETTLER KEVIN , SUAREZ GUSTAVO ARMANDO , UPLINGER KENNETH ALLEN
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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公开(公告)号：ZA9007497B
公开(公告)日：1991-06-26
申请号：ZA9007497
申请日：1990-09-19
Applicant: IBM
Inventor： CAPPS LOUIS BENNIE , LOUIS BENNIE CAPPS , PRICE WILLIAM EVERETT , WILLIAM EVERETT PRICE , UPLINGER KENNETH ALLEN , KENNETH ALLEN UPLINGER , FORSTER JIMMY GRANT , JIMMY GRANT FORSTER , RUPE ROBERT WILLIAM , ROBERT WILLIAM RUPE
CPC classification number: G06F11/1044 , G06F11/073 , G06F11/0772
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公开(公告)号：AU6388890A
公开(公告)日：1991-04-18
申请号：AU6388890
申请日：1990-10-08
Applicant: IBM
Inventor： CAPPS LOUIS BENNIE JR , FORSTER JIMMY GRANT , PRICE WILLIAN EVERETT , RUPE ROBERT WILLIAM , UPLINGER KENNETH ALLEN
Abstract: A personal computer has two memory banks (12,14) respectively connected to two parity check units (16,18) operative to detect parity errors. Upon doing so, each unit (16,18) feeds a parity error signal to a separate latch (22,24). The latches (22,24) are connected to a logic circuit (26) which is in turn connected to an interrupt controller (34) that initiates an interrupt (36) when a parity error occurs. One latch (22) is further connected to a check bit (41) of a register (40) of an I/O port (38) and the check bit (41) is set by the one latch (22). An interrupt handler reads the register and provides messages indicating which memory bank (12,14) caused the parity error.
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公开(公告)号：CA2152314A1
公开(公告)日：1996-01-28
申请号：CA2152314
申请日：1995-06-21
Applicant: IBM
Inventor： BAKER ROBERT GROVER , KETTLER KEVIN , SUAREZ GUSTOVA ARMANDO , UPLINGER KENNETH ALLEN , FREEDENBERG CANDACE JOY FLATTE
IPC: G03B15/00 , G02B3/00 , G02B6/04 , G02B6/06 , G02B13/04 , G02B13/06 , G02B13/16 , G03B19/00 , G06T1/00 , H04N5/225 , H04N5/232 , H04N5/262 , H04N7/14 , H04N7/15 , H04N7/18 , G06T5/00
Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital data conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.
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