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公开(公告)号：GB1046264A
公开(公告)日：1966-10-19
申请号：GB2163163
申请日：1963-05-30
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW
IPC: H03F3/45
Abstract: 1,046,264. Electric analogue calculating. INTERNATIONAL BUSINESS MACHINES CORPORATION. April 16, 1964 [May 30, 1963], No. 21631/63. Heading G4G. A differential amplifier comprises two similar conductivity type (e.g. NPN) transistors T1, T2; the collector of T1 being connected to the base of T2 and to a load resistor R3, the emitter of T2 being connected to the base of T1 through a potentiometric resistor network R1, and R2 capacitance connected to earth; the emitter of T1 being biased over resistor R4; and the collector of T2 being coupled to an input terminal O/P by load resistor R5. Input voltages e1, e2 from sources of similar impedance Rs are applied to terminals 1, 2 connected respectively to the base of T1, and over capacitance C1 to the emitter of T1. It is shown by mathematics that if R1 = R3 and R4 = R1 the input impedances at terminals 1, 2 are equal and the output current at the collector of T2 is proportional to the difference between input voltages e1 and e2.
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公开(公告)号：GB999752A
公开(公告)日：1965-07-28
申请号：GB2752660
申请日：1960-08-09
Applicant: IBM
Inventor： OWEN CHARLES EDWARD , PEACOCK ANTONY , TAUB DANIEL MATTHEW
IPC: G06F9/26
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公开(公告)号：FR1375223A
公开(公告)日：1964-10-16
申请号：FR946511
申请日：1963-09-04
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW
IPC: G11C17/04
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公开(公告)号：DE2246251A1
公开(公告)日：1973-03-29
申请号：DE2246251
申请日：1972-09-21
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW , OWEN CHARLES EDWARD
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Patent Agency Ranking
公开(公告)号：GB1143327A
公开(公告)日：1969-02-19
申请号：GB2772067
申请日：1967-06-15
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW , OWEN CHARLES EDWARD
IPC: G06F3/023 , G06F3/0489 , G06F3/153
Abstract: 1,143,327. Computers. INTERNATIONAL BUSINESS MACHINES CORP. 15 June, 1967, No. 27720/67. Heading G4A. An electronic digital computer produces display control signals defining different display formats in response to signals indicating that different classes of instructions are being performed, the display control signals being impressed on a radio frequency carrier wave for application as a modulated input to a television receiver. The computer, usable for teaching, has a capacitive touch keyboard, core store, addersubtractor, television receiver display and magnetic tape input/output. The core store has 222 words, each of eight 4-bit characters. Words 0-99 are available to the user to store data and instructions, words 100-221 being reserved for general-purpose registers (including modifier registers) and subroutines. The store can be addressed according to word and character within word from either of two address registers, a common increase/decrease unit being provided to increment of decrement the character portion of the address in the address register used. Two general-purpose registers are of double length i.e. two words each, the addresses of the two words being ten word positions apart in each case-in these cases a carry out of the character address portion from the increase/decrease unit increments the tens digit of the word portion of the address register to reach the second half of the double-length register after accessing of the first half has been completed. A word in store may contain a signed floating-point binary-coded-decimal number, or two basic instructions, or one macroinstruction. There are two types of basic instruction, viz. (a) register instructions which operate only on the contents of registers and specify register number(s), (b) single address instructions specifying a store base address (or rather the units and tens digits of the word portion of the base address, since the user is limited to words 0-99). A macro-instruction specifies three store base addresses similarly. The keyboard has keys for 0-9, decimal point and minus for entering operands, addresses and instructions via a keyboard register, and control keys to clear the keyboard register, load a store address register from it, increment the address by one, load the store from the keyboard register, run the computer under programme control, dump the store contents on to magnetic tape, read the tape again and compare it with store as a check, reload store from the tape, stop, and select modes of operation implied by the preceding including whether instructions are to be taken from store or keyboard register in the case when the computer is being run under programme control. The computer will also stop after executing input and output instructions, and on detection of error. Three further keys cause the computer to stop at any or all of three stages in the execution of each macro-instruction (executed by a sequence of basic instructions forming a subroutine) and of each basic instruction (unless part of the execution of a macro-instruction). The possible stopping stages for a basic instruction are (A) after the instruction has been fetched and entered into an instruction register, (B) when the true addresses of the operands have been determined, (C) when the instruction has been executed and the instruction address register has been incremented. The stopping allows the operator to see the state of the computer on the television display which shows the contents of the instruction address register, the keyboard register, the instruction register, indications of mode, error (present/absent), stopping stage, the contents of a link register used in branching to a subroutine to execute a macro-instruction, the contents of storage locations and other registers (including operands) flanked by the addresses and identifiers of the locations and registers respectively, and the state of a latch indicating whether a macro-instruction is being executed. Which of these displays occur depends to some extent on which of the three classes of instructions the instruction being executed belongs to. Apart from the check possible after dumping store to tape, detection of overflow and invalid instruction errors are also mentioned.
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公开(公告)号：GB1134704A
公开(公告)日：1968-11-27
申请号：GB631566
申请日：1966-02-12
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW
Abstract: 1,134,704. Typewriters &c. keyboards. INTERNATIONAL BUSINESS MACHINES CORP. 12 Feb., 1966, No. 6315/66. Heading B6F. [Also in Division H3] A circuit for use in a " touch keyboard " comprises a capacitor 6 arranged to be charged via one path 8 and discharged via another path and provided with means for blocking the discharge path so that a charge builds up on the capacitor 6. As described, capacitor 6 tends to charge via diode 8 during positive half-cycles of a positively-biased square wave at terminal 5 and tends to discharge via diode 10 during negative half-cycles at 5. The introduction of a capacitance 4 of an operator touching a terminal 3 or a dielectric applied thereto, will result in capacitance 4 charging via diode 11 during positive half-cycles at 5 so as to block diode 10 and thus prevent discharge. The voltage on capacitor 6 thus builds up incrementally until the cold cathode tube 2 becomes triggered, illuminating the key associated with terminal 3. In Fig. 3 (not shown) anti-phased or other square waves are applied to separate terminals associated with resistors 7, 9.
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公开(公告)号：GB1005542A
公开(公告)日：1965-09-22
申请号：GB1182462
申请日：1962-03-28
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW
IPC: G06K7/08 , G06K19/067
Abstract: 1,005,542. Permanent data stores. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 28, 1963 [March 28, 1962], No. 11824/62. Heading G4A. A read-only store comprises drive conductors 6, 7 formed into S-shaped loops, and sense conductors 4, the limbs of each S overlying a sense conductor. If current is passed through a drive conductor, the induction on a sense conductor due to the upper loop of the 8 balances that due to the lower loop. Data storage is effected by punching holes 9 in a copper sheet positioned so that the holes overlie the lower loops. Where a hole is present, the induction in the sense conductor due to the lower loop is greater than that due to the upper loop and an E.M.F. is generated in the sense conductor. Ternary information may be stored by selectively positioning the holes over the upper or lower loops. In a second embodiment, to reduce capacitive coupling between sense and drive conductors, the drive conductors are shaped as in Fig. 4 and the holes are positioned over the loops EFGH, WXYZ. Shielding conductors 5 are provided to prevent interference between storage locations. The roles of the sense and drive conductors may be reversed.
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公开(公告)号：GB985347A
公开(公告)日：1965-03-10
申请号：GB4652262
申请日：1962-12-10
Applicant: IBM
Inventor： WARWICK WILLIAM ARTHUR , BOLTON IVOR WILLIAM , GOWER KENNETH NORTHCOTT , OWEN CHARLES EDWARD , PROUDMAN ANTONY , TAUB DANIEL MATTHEW
Abstract: 985, 347. Permanent data stores. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 28, 1963 [Dec. 10, 1962], No. 46522/62. Heading G4A. [Also in Divisions H1 and H2] A permanent data store comprises a plurality of elongated insulating carriers each having a plurality of apertures spaced along its length in at least one row, the carriers being stacked with corresponding apertures in registration; a plurality of transformer cores passing through the registering apertures, each core having an associated sensing winding; and drive conductors for each row extending continuously along the length of each carrier and passing to one side or the other of each aperture so as to thread or not to thread the associated transformer core, in accordance with the data stored. The permanent store described comprises a stack of 128 flexible tapes 15, Fig. 6, made of in-. sulating material and having two rows 16, 17 of sixty apertures, rectangular transformer cores each comprising a U-shaped part 13 and a straight I-shaped part 14 passing through each pair of corresponding apertures. With each row of apertures is associated on each tape a corresponding drive winding 18 or 21, formed by deposition on the tape and threading or not threading the transformer cores according as a binary "1" or "0" is stored, each row being regarded as storing a 60- bit binary data "word" which may be read out by applying a pulse to the required winding 18 or 21 to produce output signals on the transformer secondaries 19 only where a "1" is stored. Tape fabrication. Each tape after punching with the transformer core apertures 16, 17 has deposited thereon conductive ladder networks 24, 25, Fig. 7, the unwanted portions of the networks 24, 25 being removed by punching (Fig. 8 no shown), etching or abrading (Fig. 9 not shown). As shown in Fig. 41, a copper clad polyester tape 135 is cleaned at 137, a layer of photo-resist material being applied which is then dried and an exposure made of the required continuous ladder networks. The tape is then passed through an etching bath 140, the unwanted photo-resist material being removed at 141. The required data may be punched on the tape from a program stored on punched cards (Fig. 42, not shown). Tape arrangements. In practice, each tape is punched with four rows of thirty apertures each, Fig. 10, the two outer rows being connected by a conductor 51 to form a first 60-bit stored word and the two inner rows being connected at 52 to form a second 60-bit word, the four input/output connections thus being available at one end of the tape on an extension 53. The stack of 128 tapes is arranged in two halves of 64 tapes, the two halves being in inverted relationship, Fig. 14 with an additional insulating tape (not shown) separating the two halves. Reducing inter-tape coupling. Due to the proximity of the tapes to one another undesired inter-tape capacitative and inductive coupling may result in damped oscillations or ringing in the selected winding. This effect may be reduced in three ways. Firstly, each transformer core may carry a short-circuit winding in the form of a damping resistor, these resistors being formed as loops 78, Fig. 22, on an additional insulating tape 76, one or more of such tapes being arranged in the tape store stack. Secondly, with each transformer core S, Fig. 23, may be associated an additional core T, the drive winding being wound similarly through the associated cores S, T, the core T being made of a lossy material or having resistive loops as described above. Thirdly, there may be three types of storage tapes (Figs. 24 to 26, not shown), used in turn in the tape stack and having their core apertures displaced by different amounts with respect to the centres of the ladder network elements so that when the tapes are positioned with the apertures aligned, the conductive drive windings in adjacent tapes are relatively displaced. Tape module construction. The tape stack of 128 tapes is mounted in an assembly comprising end blocks 82, 83, Fig. 27 spaced apart by rods 84. Into the blocks 82, 83 are screwed aligning pins 86 on which the tapes 39 are mounted and on the rods 84 are mounted the transformer core carrier assemblies 88, shown in detail in Fig. 31. Each core carrier assembly 88 comprises slots 92 for the I-shaped parts 14 of two cores, the four ends of two U-shaped parts 13 passing through holes in the assembly 88 to contact the I-shaped parts which are retained in position by leaf springs 96 cooperating with a retainer 94 which slides into retaining position and has contact pins 97 for making connections to the transformer secondaries which are wound in grooves 98 on the assembly 88 and not on the I-shaped parts themselves. An insulating sheet 98 Fig. 27, is placed over the closed ends of the U-shaped parts and is retained in position by brackets 99, 100, 101. The tape extension leads 53 are fanned out and plugged into one of two module boards 105, where the plugs on the tape connected to the word drive windings can be soldered in position in holes in the boards. Each board 105, Fig. 33 has a first group of four 32-hole columns 107, 108, 109, 111 and a second such group 112, 113, 114, 115, there being a central column 116 of 32 holes. The first two holes in the column 116 are connected respectively by leads 117, 118 to all the holes in the respective columns 109, 111, the last two holes being similarly connected to the columns 114, 115 and the remaining holes in the column 116 are connected each to the corresponding holes in the columns 107, 108, 112, 113 via diodes 121, the connections being illustrated in Fig. 34 (not shown). Thus selection of one of the 32 intermediate holes in the column 116 together with selection of one of the four end holes will select a particular word drive winding on a particular tape. The holes 2 in the column 116 co-operate with plugs on a connector cable (Fig. 35, not shown) for addressing the store. A total of sixteen modules may be arranged to form a large capacity permanent store (Fig. 36, not shown), the selection circuits comprising transistors (Figs. 37-40, not shown).
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公开(公告)号：DE3374238D1
公开(公告)日：1987-12-03
申请号：DE3374238
申请日：1983-07-08
Applicant: IBM
Inventor： TAUB DANIEL MATTHEW
Abstract: Each processor provides three control lines which are connected one to each of three bus lines which are part of a common bus interconnecting all the processors. Three binary control signals (p,q,r) are output one on each of the three lines from the respective processor. The signal states represent the operating state of their respective device. Wired-OR logic circuits (L1,L2,L3) connect exchanger lines to the (P,Q,R) bus lines. The logic circuits act together to respond to the control signals so as to provide a bus-controlling signal on the bus line only after each device has finished its selected operation. The bus-controlling signal is then supplied on the control lines to the synchronising circuits of each processor. Consequently the respective processor enables its associated synchronisation device to commence the next operation in its operating sequence.
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