公开(公告)号：BR0206992A

公开(公告)日：2004-02-10

申请号：BR0206992

申请日：2002-01-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRUECKLMAYR FRANZ-JOSEF ,  FRIEDINGER HANS ,  SEDLAK HOLGER ,  MAY CHRISTIAN

IPC: G06F12/14 ,  G06F21/24

Abstract: A microprocessor circuit for organizing access to data or programs stored in a memory has a microprocessor, a memory for storing an operating system, and a memory for storing individual external programs. A plurality of memory areas with respective address spaces is provided in the memory for storing the external programs. Each address space is assigned an identifier. The identifier assigned to a memory area is loaded into a first auxiliary register prior to the addressing of the memory area and the identifier of the addressed memory area is loaded into a second auxiliary register. A comparison of the contents of the first and second auxiliary registers is performed. Furthermore, each address space of a memory area is assigned at least one bit sequence defining access rights, whereby code instructions and sensitive data can be protected against write accesses from other external programs.

公开(公告)号：DE59908212D1

公开(公告)日：2004-02-05

申请号：DE59908212

申请日：1999-10-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  FREIWALD JUERGEN ,  BRIXEL OLAF

IPC: G06F9/42 ,  G06F8/41 ,  G06F9/00 ,  G06F9/45 ,  G06F11/00 ,  G06F12/14

Abstract: An efficient method for protecting entry addresses in computer programs allows direct jumps to permissible entry addresses. The permissible entry addresses are identified with a correlation of data which are not provided within the same individual instruction. By organizing the program code, the compiler or linker ensures that only legal entry addresses satisfy this correlation.

公开(公告)号：DE10127198A1

公开(公告)日：2002-12-19

申请号：DE10127198

申请日：2001-06-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GAMMEL BERNDT ,  SEDLAK HOLGER ,  MAY CHRISTIAN ,  LEDWA RALPH

IPC: G06F12/1009 ,  G06F12/10

Abstract: The physical address provision method uses a mapping rule in the form of a hierarchical tree structure with compressed nodes for conversion of a virtual address into a physical address, with initial reading of a compression indicator contained within the mapping rule, before reading a section of the virtual address assigned to the node level under consideration, for obtaining a node list entry from which the physical address is determined directly. Also included are Independent claims for the following: (a) a device for provision of a physical address from a virtual address using a hierarchy mapping process; (b) a processor system with a device for provision of a physical address from a virtual address using a hierarchy mapping process

公开(公告)号：DE50209711D1

公开(公告)日：2007-04-26

申请号：DE50209711

申请日：2002-01-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  SEDLAK HOLGER

IPC: G06F9/30 ,  G06F9/34 ,  G06F9/305 ,  G06F9/42 ,  G06K19/07

Abstract: A microprocessor circuit includes a control unit, a memory for free programming with at least one program having functions, a stack for buffer-storing data, a register bank having at least one register, and an auxiliary register that stores a number of bits, each of the bits being assigned to one of the registers of the register bank and indicating whether or not a respective register of the register bank contains information items.

公开(公告)号：DE50010164D1

公开(公告)日：2005-06-02

申请号：DE50010164

申请日：2000-05-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN

IPC: G06F1/00 ,  G06F9/38 ,  G06F21/55 ,  G07F7/10

Abstract: Secure data processing unit has a data and program memory (1), a command controller (2) and a control unit (3) for controlling a multiplicity of the function steps of the command controller. An additional empty function generator (4) is provided that generates random empty functions and thus also causes empty input-output processes. An independent claim is made for a method for securing a data processing unit against electronic eavesdropping in which additional empty transmit and receive processes are initiated.

公开(公告)号：DE10228758A1

公开(公告)日：2004-04-22

申请号：DE10228758

申请日：2002-06-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN

IPC: G06F9/40 ,  G06F9/42 ,  G06F12/02

Abstract: The method involves placing the value of the uppermost memory boundary (3) in a second predetermined memory location (5), whereby an upper boundary (6) of a partial memory area occupied by running, not fully processed functions is newly defined for each memory access and placed in a third predetermined location (7). Each memory access starts at the partial memory area upper boundary. AN Independent claim is also included for the following: (a) a circuit arrangement for allocating available memory space in a write-read memory.

公开(公告)号：DE10127194A1

公开(公告)日：2002-12-19

申请号：DE10127194

申请日：2001-06-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HARTLIEB HEIMO ,  MAY CHRISTIAN ,  DIRSCHERL GERD ,  LEDWA RALPH

IPC: G11C8/20 ,  G11C29/00

Abstract: The method determines a physical address in a physical address space and a corresponding memory cell which are associated with a logic address of a logic address space, with serviceability checking of the memory cell, to allow modification of the mapping when the memory cell is not serviceable. An Independent claim for a device for controlling mapping of a logic address of a logic address space to a physical address of a physical address space is also included.

公开(公告)号：DE10108819A1

公开(公告)日：2002-09-12

申请号：DE10108819

申请日：2001-02-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  HEILINGBRUNNER ANDREA

IPC: G07F7/08 ,  G07F7/10 ,  G01F19/00 ,  H04L9/00

Abstract: The invention relates to a method for securely handling a data communication concerning a financial transaction between a portable data carrier and a terminal. The data carrier contains a data transmission interface, a display device, an input device and a means containing unequivocal, particularly personalised data. The terminal comprises a corresponding data transmission interface. According to the invention, a direct communication occurs between the data carrier and the terminal, at least when a data communication is established, in such a manner that an involuntary transmission of information is not possible because of the distance between the data support and the terminal.

公开(公告)号：DE10105284A1

公开(公告)日：2002-08-29

申请号：DE10105284

申请日：2001-02-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MAY CHRISTIAN ,  FRIEDINGER HANS ,  SEDLAK HOLGER ,  BRUECKLMAYR FRANZ JOSEF

IPC: G06F12/14 ,  G06F21/24 ,  G06F12/06

Abstract: The invention relates to a microprocessor circuit for organising access to data or programmes that have been stored in a memory. Said circuit comprises at least one microprocessor, a memory for an operating system and at least one memory for free programming using individual external programmes. The memory used for free programming has several memory areas containing corresponding address spaces, a qualifier being assigned to each address space. The microprocessor circuit also has means, which prior to the respective addressing of a memory area, load each qualifier assigned to a respective memory area into a first auxiliary register and load the qualifier of the addressed memory area into a second auxiliary register and which then compare the first and second auxiliary registers. At least one bit sequence containing access authorisations is also assigned to each address space of a memory area, which allows code commands and sensitive data to be protected from write access emanating from external programmes.

公开(公告)号：DE50215002D1

公开(公告)日：2011-05-26

申请号：DE50215002

申请日：2002-01-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BRUECKLMAYR FRANZ-JOSEF ,  FRIEDINGER HANS ,  SEDLAK HOLGER ,  MAY CHRISTIAN

IPC: G06F12/14 ,  G06F21/24