公开(公告)号：EP3022644A4

公开(公告)日：2017-03-22

申请号：EP13889647

申请日：2013-07-15

Applicant: INTEL CORP

Inventor： CALCIU IRINA ,  GOTTSCHLICH JUSTIN E ,  SHPEISMAN TATIANA

IPC: G06F9/44 ,  G06F3/06 ,  G06F9/46 ,  G06F12/0813

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/067 ,  G06F3/0673 ,  G06F9/44 ,  G06F9/466 ,  G06F9/467 ,  G06F12/0813

公开(公告)号：EP2972878A4

公开(公告)日：2016-11-09

申请号：EP13877966

申请日：2013-03-15

Applicant: INTEL CORP

Inventor： DAUTENHAHN NATHAN ,  GOTTSCHLICH JUSTIN E ,  POKAM GILLES A ,  PEREIRA CRISTIANO L ,  HU SHILIANG ,  DANNE KLAUS ,  KASSA ROLF

IPC: G06F11/36 ,  G06F9/46 ,  G06F11/14 ,  G06F11/34

CPC classification number: G06F9/30145 ,  G06F9/3009 ,  G06F9/3895 ,  G06F9/3897 ,  G06F9/52 ,  G06F11/0724 ,  G06F11/1438 ,  G06F11/1484 ,  G06F11/3636

Abstract: A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.

Abstract translation: 一种机制被描述为软件程序雅鼎用于便利指令原子侵犯的动态，高效的管理。 实施例的方法中，如所描述的，包括接收，在从记录系统中，运行的第一宏指令的第一软件线程的记录，并运行一个第二宏指令的第二软件线程的重放逻辑。 所述第一软件线程与第二软件线程由第一芯和一个第二芯在计算设备处执行的分别，一个处理器。 记录系统可以记录在第一和第二宏指令之间的交错。 该方法包括：正确重放的第一和第二个宏指令间剩余物的记录精确地他们发生。 正确重放可以包括重放的第一和第二宏指令本地内存状态并在第一和第二软件线程的全局内存状态。

公开(公告)号：EP2972796A4

公开(公告)日：2016-10-26

申请号：EP14763196

申请日：2014-01-14

Applicant: INTEL CORP

Inventor： GOTTSCHLICH JUSTIN E ,  PEREIRA CRISTIANO LIGIERI ,  POKAM GILLES ,  WU YOUFENG

IPC: G06F9/38 ,  G06F9/46 ,  G06F11/36

CPC classification number: G06F9/52 ,  G06F11/3632

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to manage concurrent predicate expressions. An example method discloses inserting a first condition hook into a first thread, the first condition hook associated with a first condition, inserting a second condition hook into a second thread, the second condition hook associated with a second condition, preventing the second thread from executing until the first condition is satisfied, and identifying a concurrency violation when the second condition is satisfied.

Abstract translation: 公开了方法，装置，系统和制品以管理并发谓词表达。 一个示例性方法公开了将第一条件钩插入到第一线程中，与第一条件相关联的第一条件钩，将第二条件钩插入到第二线程中，与第二条件相关联的第二条件钩，防止第二线程执行 直到满足第一条件，并且当满足第二条件时识别并发冲突。