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公开(公告)号:US20190006939A1
公开(公告)日:2019-01-03
申请号:US15638643
申请日:2017-06-30
Applicant: INTEL CORPORATION
Inventor: Harish Krishnamurthy , Khondker Ahmed , Vivek De , Nachiket Desai , Suhwan Kim , Xiaosen Liu , Turbo Majumder , Krishnan Ravichandran , Christopher Schaef , Vaibhav Vaidya , Sriram Vangal
Abstract: Embodiments described herein describe operating a master-slave controller. Operating the master-slave controller comprises, based on a determination that the first output voltage value is greater than the second output voltage value, calculating a first duty cycle value and an input voltage value and the second voltage regulator, calculating a second duty cycle value based on the first duty cycle value, and based on a determination that the second output voltage value is greater than or equal to the first output voltage value, calculating the second duty cycle value based on the second output voltage value and the input voltage value and calculating the first duty cycle value based on the second duty cycle value and configuring the first voltage regulator with the first duty cycle value and the second voltage regulator with the second duty cycle value.
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公开(公告)号:US20250007395A1
公开(公告)日:2025-01-02
申请号:US18216940
申请日:2023-06-30
Applicant: Intel Corporation
Inventor: Keng Chen , Arvind Raghavan , Rachid Rayess , Tamir Salus , Christopher Schaef , Huanhuan Zhang , Sivaraman Masilamani , Gayathri Devi Sridharan , Subhrashankha Ghosh
Abstract: A switched capacitor voltage regulator (SCVR) design, such as a continuous capacitive voltage regulator (C2VR) design, may use capacitors and switches to provide improved cost and space efficiencies. A remote sensing circuit may be used to improve C2VR performance. By adding a remote sensing circuit to the regulation feedback loop within the C2VR circuit design, the C2VR circuit may provide improved accuracy in voltage regulation, such as by providing a correction based on the voltage error between the remote-sensed voltage and the reference target. The remote sensing circuit may also provide transient information for under-voltage detection at an output terminal. This detected transient may become an alternating current (AC) portion of the under-voltage detection threshold, which improves the ability of the C2VR circuit to provide early detection for any under-voltage fault.
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公开(公告)号:US20240154526A1
公开(公告)日:2024-05-09
申请号:US17983708
申请日:2022-11-09
Applicant: Intel Corporation
Inventor: Keng Chen , Huanhuan Zhang , Arvind Raghavan , Tamir Salus , Christopher Schaef , Gayathri Devi Sridharan
CPC classification number: H02M3/06 , H02M1/0009
Abstract: A device comprises a first comparator to generate a first clock signal based on a reference voltage and a first voltage at an output of a switched-capacitor power converter (SCPC), and a second comparator to generate a first control signal based on the first voltage and a threshold voltage. A sensor is to generate a second control signal based on one of a level of a current of the first clock signal, or a duty cycle of the first clock signal. A frequency divider circuit is to generate a second clock signal based on the first control signal and the second control signal, and in some embodiments, further based on one of the first clock signal or a third clock signal. Controller circuitry is to operate switch circuitry of the SCPC based on the first clock signal.
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公开(公告)号:US11336270B2
公开(公告)日:2022-05-17
申请号:US17006726
申请日:2020-08-28
Applicant: Intel Corporation
Inventor: Nachiket Desai , Suhwan Kim , Harish Krishnamurthy , Christopher Schaef
IPC: H03K3/00 , H03K3/037 , H03K5/24 , H03K17/687
Abstract: A digital self-start controller, which is functional without fuse and/or trim information. The self-start controller protects a DC-DC converter against large inrush currents and voltage overshoots, while being capable of following a variable VID (voltage identification) reference ramp imposed by the system. The self-start controller uses a relaxation oscillator to set the switching frequency of the DC-DC converter. The oscillator can be initialized using either a clock or current reference to be close to a desired operating frequency. The output of the DC-DC converter is coupled weakly to the oscillator to set the duty cycle for closed loop operation. The controller is naturally biased such that the output supply voltage is always slightly higher than a set point, eliminating the need for any process, voltage, and/or temperature (PVT) imposed trims.
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公开(公告)号:US10938327B2
公开(公告)日:2021-03-02
申请号:US15721548
申请日:2017-09-29
Applicant: Intel Corporation
Inventor: Suhwan Kim , Vaibhav Vaidya , Christopher Schaef
Abstract: An embodiment of a harvester apparatus comprising two or more charge pump stages may include at least a first charge pump stage to receive an alternating current source, and a second charge pump stage coupled to the first charge pump stage.
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公开(公告)号:US10910946B2
公开(公告)日:2021-02-02
申请号:US16144961
申请日:2018-09-27
Applicant: Intel Corporation
Inventor: Christopher Schaef
Abstract: An apparatus has a comparator circuitry (e.g., auto-zero comparator) with a first input, a second input, a third input; and an output; a first device (e.g., a low-side switch) coupled to the first and second inputs of the comparator; and a circuitry (e.g., a self-tuning logic) to generate a digital code which represents a comparator offset adjustment with reference to detection of current through a second device (e.g., an inductor), wherein the digital code (e.g., a multibit digital signal) is provided to the third input of the comparator circuitry.
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公开(公告)号:US10320197B2
公开(公告)日:2019-06-11
申请号:US14926975
申请日:2015-10-29
Applicant: Intel Corporation
Inventor: Vaibhav Vaidya , Lilly Huang , Christopher Schaef
Abstract: In an embodiment, a system includes controller circuitry to initiate a plurality of energy transfer cycles. Each energy transfer cycle includes an input time period during which corresponding input energy is received by a power train, and an output time period during which corresponding output energy is output from the power train. The system also includes energy detection logic to provide, upon completion of each energy transfer cycle, a corresponding indication of corresponding residual energy retained by the power train. Other embodiments are described and claimed.
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公开(公告)号:US20180267591A1
公开(公告)日:2018-09-20
申请号:US15462257
申请日:2017-03-17
Applicant: INTEL CORPORATION
Inventor: Dileep Kurian , Tanay Karnik , David Arditti Ilitzky , Ankit Gupta , Sriram Kabisthalam Muthukumar , Vaibhav Vaidya , Suhwan Kim , Christopher Schaef , Ilya Klochkov
IPC: G06F1/32
CPC classification number: G06F1/3212 , G06F1/3287 , G06F1/329 , Y02D70/00 , Y02D70/26
Abstract: The present disclosure provides for the management of power of a NZE IoT device. Managing power can include receiving the one or more asynchronous events from the asynchronous event system, determining if any of the one or more asynchronous events meet a respective charge qualification, generating the power-on command for the power-managed compute system if any of the one or more asynchronous events meet the respective charge qualification, and waiting for a power source to reach a threshold associated with the respective charge qualification if any of the one or more asynchronous events do not meet the respective charge qualification.
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公开(公告)号:US12068684B2
公开(公告)日:2024-08-20
申请号:US17030132
申请日:2020-09-23
Applicant: Intel Corporation
Inventor: Krishna Bharath , Christopher Schaef , William J. Lambert , Kaladhar Radhakrishnan
Abstract: Embodiments disclosed herein include inductor arrays. In an embodiment, an inductor array comprises a first inductor with a first inductance. In an embodiment, the first inductor is switched at a first frequency. In an embodiment, the inductor array further comprises a second inductor with a second inductance that is different than the first inductance. In an embodiment, the second inductor is switched at a second frequency that is different than the first frequency.
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公开(公告)号:US20230060727A1
公开(公告)日:2023-03-02
申请号:US17412810
申请日:2021-08-26
Applicant: Intel Corporation
Inventor: Kaladhar Radhakrishnan , Krishna Bharath , William J. Lambert , Adel A. Elsherbini , Sriram Srinivasan , Christopher Schaef
IPC: H01L25/18 , H01L25/065 , H01L23/00 , H01L25/00
Abstract: A microelectronic assembly is provided comprising a first integrated circuit (IC) die having an electrical load circuit, a second IC die having a portion of a voltage regulator (VR), and a third IC die comprising inductors of the VR. The third IC die is between the first IC die and the second IC die, and the VR receives power at a first voltage and provides power at a second voltage to the electrical load circuit, the second voltage being lower than the first voltage. In various embodiments, the inductors in the third IC die comprise magnetic thin films. The third IC die may be a passive die without any active elements in some embodiments. In some embodiments, the microelectronic assembly further comprises a package substrate having conductive pathways, and the second IC die is between the third IC die and the package substrate.
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